;PALASM Design Description ;---------------------------------- Declaration Segment ------------ TITLE Up/Down Couter using REG outputs USING State bit assignment PATTERN REVISION AUTHOR E. M. Schwartz COMPANY DATE 2/10/97 CHIP _count PAL22V10 ;---------------------------------- PIN Declarations --------------- PIN 1 CLOCK ; INPUT PIN 2 UP_DWN ; INPUT PIN 3 ENABLE ; INPUT PIN 14 CNT0 REGISTERED ; OUTPUT PIN 15 CNT1 REGISTERED ; OUTPUT PIN 16 CNT2 REGISTERED ; OUTPUT ;----------------------------------- State Segment ------ STATE MOORE_MACHINE START_UP := POWER_UP -> ZERO ;begin transition equations ZERO := UP -> ONE + DOWN -> SEVEN + STOP -> ZERO +-> ZERO ONE := UP -> TWO + DOWN -> ZERO + STOP -> ONE +-> ZERO TWO := UP -> THREE + DOWN -> ONE + STOP -> TWO +-> ZERO THREE := UP -> FOUR + DOWN -> TWO + STOP -> THREE +-> ZERO FOUR := UP -> FIVE + DOWN -> THREE + STOP -> FOUR +-> ZERO FIVE := UP -> SIX + DOWN -> FOUR + STOP -> FIVE +-> ZERO SIX := UP -> SEVEN + DOWN -> FIVE + STOP -> SIX +-> ZERO SEVEN := UP -> ZERO + DOWN -> SIX + STOP -> SEVEN +-> ZERO ;Begin state assignment ;NO output equations (.outf) ZERO = /CNT2*/CNT1*/CNT0 ONE = /CNT2*/CNT1* CNT0 TWO = /CNT2* CNT1*/CNT0 THREE = /CNT2* CNT1* CNT0 FOUR = CNT2*/CNT1*/CNT0 FIVE = CNT2*/CNT1* CNT0 SIX = CNT2* CNT1*/CNT0 SEVEN = CNT2* CNT1* CNT0 CONDITIONS UP = ENABLE * UP_DWN DOWN = ENABLE * /UP_DWN STOP = /ENABLE ;----------------------------------- Simulation Segment ------------ SIMULATION TRACE_ON ENABLE UP_DWN CNT2 CNT1 CNT0 SETF /CLOCK /ENABLE UP_DWN CLOCKF CLOCK CHECK /CNT2 /CNT1 /CNT0 CLOCKF CLOCK CHECKQ /CNT2 /CNT1 /CNT0 ;CHECKQ seems to do the same as CHECK SETF ENABLE CLOCKF CLOCK CHECK /CNT2 /CNT1 CNT0 CLOCKF CLOCK CHECK /CNT2 CNT1 /CNT0 TRACE_OFF ;-------------------------------------------------------------------