*********************************************************************
* SPI EXAMPLE (MASTER Table data)  EEL-4744    EMS & TAC *
*********************************************************************
***************************************************
** SEND Table of data TO THE SLAVE AND RECEIVE Table of data FROM 
*	THE SLAVE.
***************************************************
*
***************************************************
** SYMBOL DEFINITIONS
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* 68HCII REGISTERS
***************************************************
STACK	EQU	$01FF
BASE	EQU	$1000	;BEGINNING OF REGISTERS
DDRD	EQU	$09	;DATA DIRECTION REGISTER
SPCR	EQU	$28	;SPI CONTROL REGISTER
SPSR	EQU	$29	;SPI STATUS REGISTER
SPDR	EQU	$2A	;SPI DATA REGISTER

* MASKS
BIT7	EQU	%10000000
BIT6	EQU	%01000000
BIT5	EQU	%00100000
BIT4	EQU	%00010000
BIT3	EQU	%00001000
BIT2	EQU	%00000100
BIT10	EQU	%00000011
BIT543	EQU	%00111000
BIT764210	EQU	%11010111
BIT53	EQU	%00101000
*
***************************************************
** DATA SECTION
***************************************************
	ORG	$20
DATAM	FCB	$12
DATAS	RMB	1
	ORG	$30
TABLE_M	FCC	'HELLO!'
SIZE_M	EQU	*-TABLE_M
SIZE_S	EQU	*-TABLE_M
TABLE_S	RMB	SIZE_S

	ORG	$FFD8
	FDB	SPI_ISR	;SPI INTERRUPT VECTOR
*
***************************************************
** MAIN PROGRAM
***************************************************
	ORG	$B600
*--------------------------------------------------
* INITIALIZATION
*--------------------------------------------------
* INITIALIZE STACK & Registers
	LDS	#STACK
	LDX	#BASE
*
* ENABLE SPI OUTPUTS
	BSET	DDRD,X BIT543	;outputs SS-SCK-MOSI
	BCLR	DDRD,X BIT2	;input MISO
*
* INITIALIZE SPI
*  TURN ON SPI INTERRUPT
*  SET AS MASTER; CPHA=1, CPOL=0; /32 CLOCK RATE
* BSET	SPCR,X BIT764210	
	BSET	SPCR,X BIT4	;Set for master (Do this first!)
	BCLR	SPCR,X BIT7	;DISable SPI Interrupt
	BSET	SPCR,X BIT6	;Enable SPI system
	BSET	SPCR,X BIT2	;CPHA=1
	BSET	SPCR,X BIT10	;Speed E/32 if master
* BCLR	SPCR,X BIT53	
	BCLR	SPCR,X BIT5	;Single slave so wired-or not needed
	BCLR	SPCR,X BIT3	;CPOL=0
*
* TURN ON INTERRUPT SYSTEM
	CLI
*--------------------------------------------------
* Send out the data
*--------------------------------------------------
	LDY	#Table_M
	LDAB	#SIZE_M
HERE	LDAA	0,Y
	STAA	SPDR,X		;Send out data from master
WAIT	BRCLR	SPSR,X BIT7 WAIT ;Poll the flag
	LDAA	SPDR,X		;Read in data from slave
	STAA	SIZE_M,Y	; ...
	INY
	DECB
	BNE	HERE
*
* ????WHAT IS THE LIMITATION OF THE ABOVE CODE????
*
***************************************************
** INTERRUPT SERVICE ROUTINE
***************************************************
	ORG	$B700
SPI_ISR	LDX   	#BASE
*
* INTERRUPT FROM SPI?
	BRCLR	SPSR,X BIT7 RT_SPI ;IGNORE ILLEGAL
*				    ..INTERRUPT
	LDAA	SPDR,X
	STAA	DATAS
*
* RETURN FROM INTERRUPT
RT_SPI	RTI
