Hello Dr. Schwartz,<br><br>

You may not remember me, I graduated back in december [2004] and the last
week (final's week) I asked about Verilog and VHDL... your answer was
to pick verilog and see how it goes.   Well I did so.   Since I have a
mac computer I used ICARUS Verilog (iVerilog)  together with gtkwave
viewer to compile the code and see the waveforms and it has been fun. 
At this point I am able to do some designs at the gate level and data
flow level.  I have been ignoring the behavioral modeling because I am
focused on design for FPGAs and behaviral designs can not always be
synthesized.<br><br>

I write this email bacause I feel that I could have not gotten to this
point without what you taught me.  By that I mean the solid
understanding of fundamental concepts, the way to aproach complicated
problems to be able to solve them and, most important, not to give up
to the difficulty.   For all that... thank you.<br><br>

<!-- Jose Cancino -->
xxxx <br>
[a student in Fall 2004's EEL 4712]<br>
[March 9, 2005]<br>