bump.lst - generated by MGTEK Assembler ASM12 V1.16 Build 101 for WIN32 (x86) - Sat Mar 30 00:08:27 2002 1: * Filename : BUMP.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains bump sensor functions. 6: * The following functions are available: 7: * 8: * INITBUMP - Initializes bump sensors 9: * BUMPED - Determines if a bump has occured 10: * BUMPREACT - Determines reaction if a bump has occurred 11: * 12: * 13: =00000001 #define __DEBUGBUMP_ 1 14: 15: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 14: =00000001 #define __HC12_ASM_ 1 15: 16: =00000000 IO_BASE EQU 0 17: 18: =00000000 PORTA EQU (IO_BASE + $00) 19: =00000001 PORTB EQU (IO_BASE + $01) 20: =00000002 DDRA EQU (IO_BASE + $02) 21: =00000003 DDRB EQU (IO_BASE + $03) 22: =00000008 PORTE EQU (IO_BASE + $08) 23: =00000009 DDRE EQU (IO_BASE + $09) 24: =0000000A PEAR EQU (IO_BASE + $0A) 25: =0000000B MODE EQU (IO_BASE + $0B) 26: =0000000C PUCR EQU (IO_BASE + $0C) 27: =0000000D RDRIV EQU (IO_BASE + $0D) 28: =00000010 INITRM EQU (IO_BASE + $10) 29: =00000011 INITRG EQU (IO_BASE + $11) 30: =00000012 INITEE EQU (IO_BASE + $12) 31: =00000013 MISC EQU (IO_BASE + $13) 32: =00000014 RTICTL EQU (IO_BASE + $14) 33: =00000015 RTIFLG EQU (IO_BASE + $15) 34: =00000016 COPCTL EQU (IO_BASE + $16) 35: =00000017 COPRST EQU (IO_BASE + $17) 36: =0000001E INTCR EQU (IO_BASE + $1E) 37: =0000001F HPRIO EQU (IO_BASE + $1F) 38: =00000020 BRKCT0 EQU (IO_BASE + $20) 39: =00000021 BRKCT1 EQU (IO_BASE + $21) 40: =00000022 BRKAH EQU (IO_BASE + $22) 41: =00000023 BRKAL EQU (IO_BASE + $23) 42: =00000024 BRKDH EQU (IO_BASE + $24) 43: =00000025 BRKDL EQU (IO_BASE + $25) 44: =00000040 PWCLK EQU (IO_BASE + $40) 45: =00000041 PWPOL EQU (IO_BASE + $41) 46: =00000042 PWEN EQU (IO_BASE + $42) 47: =00000043 PWPRES EQU (IO_BASE + $43) 48: =00000044 PWSCAL0 EQU (IO_BASE + $44) 49: =00000045 PWSCNT0 EQU (IO_BASE + $45) 50: =00000046 PWSCAL1 EQU (IO_BASE + $46) 51: =00000047 PWSCNT1 EQU (IO_BASE + $47) 52: =00000048 PWCNT0 EQU (IO_BASE + $48) 53: =00000049 PWCNT1 EQU (IO_BASE + $49) 54: =0000004A PWCNT2 EQU (IO_BASE + $4A) 55: =0000004B PWCNT3 EQU (IO_BASE + $4B) 56: =0000004C PWPER0 EQU (IO_BASE + $4C) 57: =0000004D PWPER1 EQU (IO_BASE + $4D) 58: =0000004E PWPER2 EQU (IO_BASE + $4E) 59: =0000004F PWPER3 EQU (IO_BASE + $4F) 60: =00000050 PWDTY0 EQU (IO_BASE + $50) 61: =00000051 PWDTY1 EQU (IO_BASE + $51) 62: =00000052 PWDTY2 EQU (IO_BASE + $52) 63: =00000053 PWDTY3 EQU (IO_BASE + $53) 64: =00000054 PWCTL EQU (IO_BASE + $54) 65: =00000055 PWTST EQU (IO_BASE + $55) 66: =00000056 PORTP EQU (IO_BASE + $56) 67: =00000057 DDRP EQU (IO_BASE + $57) 68: =00000060 ATDCTL0 EQU (IO_BASE + $60) 69: =00000061 ATDCTL1 EQU (IO_BASE + $61) 70: =00000062 ATDCTL2 EQU (IO_BASE + $62) 71: =00000063 ATDCTL3 EQU (IO_BASE + $63) 72: =00000064 ATDCTL4 EQU (IO_BASE + $64) 73: =00000065 ATDCTL5 EQU (IO_BASE + $65) 74: =00000066 ATDSTAT EQU (IO_BASE + $66) 75: =00000066 ATDSTATH EQU (IO_BASE + $66) 76: =00000067 ATDSTATL EQU (IO_BASE + $67) 77: =00000068 ATDTST EQU (IO_BASE + $68) 78: =00000068 ATDTSTH EQU (IO_BASE + $68) 79: =00000069 ATDTSTL EQU (IO_BASE + $69) 80: =0000006F PORTAD EQU (IO_BASE + $6F) 81: =00000070 ADR0 EQU (IO_BASE + $70) 82: =00000070 ADR0H EQU (IO_BASE + $70) 83: =00000071 ADR0L EQU (IO_BASE + $71) 84: =00000072 ADR1 EQU (IO_BASE + $72) 85: =00000072 ADR1H EQU (IO_BASE + $72) 86: =00000073 ADR1L EQU (IO_BASE + $73) 87: =00000074 ADR2 EQU (IO_BASE + $74) 88: =00000074 ADR2H EQU (IO_BASE + $74) 89: =00000075 ADR2L EQU (IO_BASE + $75) 90: =00000076 ADR3 EQU (IO_BASE + $76) 91: =00000076 ADR3H EQU (IO_BASE + $76) 92: =00000077 ADR3L EQU (IO_BASE + $77) 93: =00000078 ADR4 EQU (IO_BASE + $78) 94: =00000078 ADR4H EQU (IO_BASE + $78) 95: =00000079 ADR4L EQU (IO_BASE + $79) 96: =0000007A ADR5 EQU (IO_BASE + $7A) 97: =0000007A ADR5H EQU (IO_BASE + $7A) 98: =0000007B ADR5L EQU (IO_BASE + $7B) 99: =0000007C ADR6 EQU (IO_BASE + $7C) 100: =0000007C ADR6H EQU (IO_BASE + $7C) 101: =0000007D ADR6L EQU (IO_BASE + $7D) 102: =0000007E ADR7 EQU (IO_BASE + $7E) 103: =0000007E ADR7H EQU (IO_BASE + $7E) 104: =0000007F ADR7L EQU (IO_BASE + $7F) 105: =00000080 TIOS EQU (IO_BASE + $80) 106: =00000081 CFORC EQU (IO_BASE + $81) 107: =00000082 OC7M EQU (IO_BASE + $82) 108: =00000083 OC7D EQU (IO_BASE + $83) 109: =00000084 TCNT EQU (IO_BASE + $84) 110: =00000084 TCNTH EQU (IO_BASE + $84) 111: =00000085 TCNTL EQU (IO_BASE + $85) 112: =00000086 TSCR EQU (IO_BASE + $86) 113: =00000088 TCTL1 EQU (IO_BASE + $88) 114: =00000089 TCTL2 EQU (IO_BASE + $89) 115: =0000008A TCTL3 EQU (IO_BASE + $8A) 116: =0000008B TCTL4 EQU (IO_BASE + $8B) 117: =0000008C TMSK1 EQU (IO_BASE + $8C) 118: =0000008D TMSK2 EQU (IO_BASE + $8D) 119: =0000008E TFLG1 EQU (IO_BASE + $8E) 120: =0000008F TFLG2 EQU (IO_BASE + $8F) 121: =00000090 TC0 EQU (IO_BASE + $90) 122: =00000090 TC0H EQU (IO_BASE + $90) 123: =00000091 TC0L EQU (IO_BASE + $91) 124: =00000092 TC1 EQU (IO_BASE + $92) 125: =00000092 TC1H EQU (IO_BASE + $92) 126: =00000093 TC1L EQU (IO_BASE + $93) 127: =00000094 TC2 EQU (IO_BASE + $94) 128: =00000094 TC2H EQU (IO_BASE + $94) 129: =00000095 TC2L EQU (IO_BASE + $95) 130: =00000096 TC3 EQU (IO_BASE + $96) 131: =00000096 TC3H EQU (IO_BASE + $96) 132: =00000097 TC3L EQU (IO_BASE + $97) 133: =00000098 TC4 EQU (IO_BASE + $98) 134: =00000098 TC4H EQU (IO_BASE + $98) 135: =00000099 TC4L EQU (IO_BASE + $99) 136: =0000009A TC5 EQU (IO_BASE + $9A) 137: =0000009A TC5H EQU (IO_BASE + $9A) 138: =0000009B TC5L EQU (IO_BASE + $9B) 139: =0000009C TC6 EQU (IO_BASE + $9C) 140: =0000009C TC6H EQU (IO_BASE + $9C) 141: =0000009D TC6L EQU (IO_BASE + $9D) 142: =0000009E TC7 EQU (IO_BASE + $9E) 143: =0000009E TC7H EQU (IO_BASE + $9E) 144: =0000009F TC7L EQU (IO_BASE + $9F) 145: =000000A0 PACTL EQU (IO_BASE + $A0) 146: =000000A1 PAFLG EQU (IO_BASE + $A1) 147: =000000A2 PACN3 EQU (IO_BASE + $A2) 148: =000000A3 PACN2 EQU (IO_BASE + $A3) 149: =000000A4 PACN1 EQU (IO_BASE + $A4) 150: =000000A5 PACN0 EQU (IO_BASE + $A5) 151: =000000A6 MCCTL EQU (IO_BASE + $A6) 152: =000000A7 MCFLG EQU (IO_BASE + $A7) 153: =000000A8 ICPACR EQU (IO_BASE + $A8) 154: =000000A9 DLYCT EQU (IO_BASE + $A9) 155: =000000AA ICOVW EQU (IO_BASE + $AA) 156: =000000AB ICSYS EQU (IO_BASE + $AB) 157: =000000AD TIMTST EQU (IO_BASE + $AD) 158: =000000AE PORTT EQU (IO_BASE + $AE) 159: =000000AF DDRT EQU (IO_BASE + $AF) 160: =000000B0 PBCTL EQU (IO_BASE + $B0) 161: =000000B1 PBFLG EQU (IO_BASE + $B1) 162: =000000B2 PA3H EQU (IO_BASE + $B2) 163: =000000B3 PA2H EQU (IO_BASE + $B3) 164: =000000B4 PA1H EQU (IO_BASE + $B4) 165: =000000B5 PA0H EQU (IO_BASE + $B5) 166: =000000B6 MCCNT EQU (IO_BASE + $B6) 167: =000000B6 MCCNTH EQU (IO_BASE + $B6) 168: =000000B7 MCCNTL EQU (IO_BASE + $B7) 169: =000000C0 SC0BD EQU (IO_BASE + $C0) 170: =000000C0 SC0BDH EQU (IO_BASE + $C0) 171: =000000C1 SC0BDL EQU (IO_BASE + $C1) 172: =000000C2 SC0CR1 EQU (IO_BASE + $C2) 173: =000000C3 SC0CR2 EQU (IO_BASE + $C3) 174: =000000C4 SC0SR1 EQU (IO_BASE + $C4) 175: =000000C5 SC0SR2 EQU (IO_BASE + $C5) 176: =000000C6 SC0DRH EQU (IO_BASE + $C6) 177: =000000C7 SC0DRL EQU (IO_BASE + $C7) 178: =000000D0 SP0CR1 EQU (IO_BASE + $D0) 179: =000000D1 SP0CR2 EQU (IO_BASE + $D1) 180: =000000D2 SP0BR EQU (IO_BASE + $D2) 181: =000000D3 SP0SR EQU (IO_BASE + $D3) 182: =000000D5 SP0DR EQU (IO_BASE + $D5) 183: =000000D6 PORTS EQU (IO_BASE + $D6) 184: =000000D7 DDRS EQU (IO_BASE + $D7) 185: =000000DB PURDS EQU (IO_BASE + $DB) 186: =000000E0 SLOW EQU (IO_BASE + $E0) 187: =000000F0 EEMCR EQU (IO_BASE + $F0) 188: =000000F1 EEPROT EQU (IO_BASE + $F1) 189: =000000F2 EETST EQU (IO_BASE + $F2) 190: =000000F3 EEPROG EQU (IO_BASE + $F3) 191: =000000F4 FEELCK EQU (IO_BASE + $F4) 192: =000000F5 FEEMCR EQU (IO_BASE + $F5) 193: =000000F6 FEETST EQU (IO_BASE + $F6) 194: =000000F7 FEECTL EQU (IO_BASE + $F7) 195: =000000F8 BCR1 EQU (IO_BASE + $F8) 196: =000000F9 BSVR EQU (IO_BASE + $F9) 197: =000000FA BCR2 EQU (IO_BASE + $FA) 198: =000000FB BDR EQU (IO_BASE + $FB) 199: =000000FC BARD EQU (IO_BASE + $FC) 200: =000000FD DLCSCR EQU (IO_BASE + $FD) 201: =000000FE PORTDLC EQU (IO_BASE + $FE) 202: =000000FF DDRDLC EQU (IO_BASE + $FF) 203: * 204: ************************************************************ 205: * Interrupt vector addresses 206: ************************************************************ 207: * 208: =0000FFCC MOD_UNDER_IVECT EQU $FFCC 209: =0000FFCA PACB_OVER_IVECT EQU $FFCA 210: =0000FFD0 BDLC_IVECT EQU $FFD0 211: =0000FFD2 ATD_IVECT EQU $FFD2 212: =0000FFD4 RES4_IVECT EQU $FFD4 213: =0000FFD6 SCI0_IVECT EQU $FFD6 214: =0000FFD8 SPI_TC_IVECT EQU $FFD8 215: =0000FFDA PAC_IN_EDGE_IVECT EQU $FFDA 216: =0000FFDC PAC_OVER_IVECT EQU $FFDC 217: =0000FFDE TMR_OVER_IVECT EQU $FFDE 218: =0000FFE0 T7_IVECT EQU $FFE0 219: =0000FFE2 T6_IVECT EQU $FFE2 220: =0000FFE4 T5_IVECT EQU $FFE4 221: =0000FFE6 T4_IVECT EQU $FFE6 222: =0000FFE8 T3_IVECT EQU $FFE8 223: =0000FFEA T2_IVECT EQU $FFEA 224: =0000FFEC T1_IVECT EQU $FFEC 225: =0000FFEE T0_IVECT EQU $FFEE 226: =0000FFF0 RTI_IVECT EQU $FFF0 227: =0000FFF0 IRQ_IVECT EQU $FFF0 228: =0000FFF0 XIRQ_IVECT EQU $FFF0 229: =0000FFF0 SWI_IVECT EQU $FFF0 230: =0000FFF0 TRAP_IVECT EQU $FFF0 231: =0000FFF0 COP_FAIL_IVECT EQU $FFF0 232: =0000FFF0 COP_CLK_FAIL_IVECT EQU $FFF0 233: =0000FFF0 RESET_IVECT EQU $FFF0 234: * 235: ************************************************************ 236: * Pseudointerrupt vector addresses 237: ************************************************************ 238: * 239: =00000800 MOD_UNDER_PVECT EQU $0800 240: =00000803 PACB_OVER_PVECT EQU $0803 241: =00000806 BDLC_PVECT EQU $0806 242: =00000809 ATD_PVECT EQU $0809 243: =0000080C SCI0_PVECT EQU $080C 244: =0000080F SPI_TC_PVECT EQU $080F 245: =00000812 PAC_IN_EDGE_PVECT EQU $0812 246: =00000815 PAC_OVER_PVECT EQU $0815 247: =00000818 TMR_OVER_PVECT EQU $0818 248: =0000081B T7_PVECT EQU $081B 249: =0000081E T6_PVECT EQU $081E 250: =00000821 T5_PVECT EQU $0821 251: =00000824 T4_PVECT EQU $0824 252: =00000827 T3_PVECT EQU $0827 253: =0000082A T2_PVECT EQU $082A 254: =0000082D T1_PVECT EQU $082D 255: =00000830 T0_PVECT EQU $0830 256: =00000833 RTI_PVECT EQU $0833 257: =00000836 IRQ_PVECT EQU $0836 258: =00000839 XIRQ_PVECT EQU $0839 259: =0000083C SWI_PVECT EQU $083C 260: =0000083F TRAP_PVECT EQU $083F 261: =00000842 COP_FAIL_PVECT EQU $0842 262: =00000845 COP_CLK_FAIL_PVECT EQU $0845 263: =00000848 RESET_PVECT EQU $0848 264: =0000084B USERPROG_PVECT EQU $084B 265: * 266: ************************************************************ 267: * Bit Equates 268: ************************************************************ 269: * 270: =00000001 BIT0 EQU %00000001 ; bit 0 271: =000000FE INV0 EQU %11111110 ; inverse of bit 0 272: =00000002 BIT1 EQU %00000010 ; bit 1 273: =000000FD INV1 EQU %11111101 ; inverse of bit 1 274: =00000004 BIT2 EQU %00000100 ; bit 2 275: =000000FB INV2 EQU %11111011 ; inverse of bit 2 276: =00000008 BIT3 EQU %00001000 ; bit 3 277: =000000F7 INV3 EQU %11110111 ; inverse of bit 3 278: =00000010 BIT4 EQU %00010000 ; bit 4 279: =000000EF INV4 EQU %11101111 ; inverse of bit 4 280: =00000020 BIT5 EQU %00100000 ; bit 5 281: =000000DF INV5 EQU %11011111 ; inverse of bit 5 282: =00000040 BIT6 EQU %01000000 ; bit 6 283: =000000BF INV6 EQU %10111111 ; inverse of bit 6 284: =00000080 BIT7 EQU %10000000 ; bit 7 285: =0000007F INV7 EQU %01111111 ; inverse of bit 7 286: * 287: ************************************************************ 288: * Port Equates 289: ************************************************************ 290: * 291: =00004000 SEG7PORT EQU $4000 ; 7-segment display output port 292: =00005000 OUT1PORT EQU $5000 ; Output port 1 293: =00006000 LED1PORT EQU $6000 ; LED Output port 1 294: =00007000 LED2PORT EQU $7000 ; LED Output port 2 295: * IN1PORT EQU $4000 ; Input port 1 296: * IN2PORT EQU $5000 ; Input port 2 297: * 298: ************************************************************ 299: * STEVE Common System Equates 300: ************************************************************ 301: * 302: 303: * Object avoidance/following reaction equates 304: ********************************************* 305: =00000001 REACTBACK EQU $01 ; Reaction values 306: =00000002 REACTHARD EQU $02 ; 307: =00000003 REACTSOFT EQU $03 ; 308: =00000000 NOACTION EQU $00 ; 309: 310: =00000000 REACTRAND EQU $00 ; 311: =00000001 REACTLEFT EQU $01 ; 312: =00000002 REACTRIGHT EQU $02 ; 313: 314: #endif 16: 17: * 18: ************************************************************ 19: * A/D Debug Code 20: ************************************************************ 21: * 22: #ifdef __DEBUGBUMP_ 23: =0000084B ORG USERPROG_PVECT 24: 084B 06 A000 [03] JMP TEST 25: 26: =0000A000 ORG $A000 27: 28: A000 86 00 [01] TEST LDAA #$00 ; turn off COP watchdog timer 29: A002 5A 16 [02] STAA COPCTL 30: 31: A004 CF 0BFF [02] LDS #$0bff ; init the stack pointer 32: 33: A007 16 A0E7 [04] JSR INITATD ; init A/D system 34: A00A 16 A0D9 [04] JSR INITSCI ; init SCI system 35: 36: A00D CE 0064 [02] TEST1 LDX #100 ; wait 1/10 sec 37: A010 16 A03D [04] JSR WAIT ; 38: A013 16 A128 [04] JSR BUMPED ; check bumpers 39: A016 04 50 F4 [03] TBEQ A,TEST1 ; if bumper not pressed, keep checking 40: A019 CE A02A [02] LDX #BUMPSTR ; print bump string 41: A01C 16 A08D [04] JSR OUTSTR ; 42: A01F 16 A0AB [04] JSR OUTNUM ; print analog value 43: A022 CE A03A [02] LDX #NEWLINE ; print end of line 44: A025 16 A08D [04] JSR OUTSTR ; 45: A028 20 E3 [03] BRA TEST1 ; 46: 47: A02A 42 55 4D 50 45 52 BUMPSTR DC.B 'BUMPER VALUE = ' A030 20 56 41 4C 55 45 A036 20 3D 20 48: A039 04 DC.B EOS 49: A03A 0D 0A 04 NEWLINE DC.B CR,LF,EOS 50: 51: #include "wait.asm" 1: * Filename : WAIT.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains time functions. The 6: * following functions are available: 7: * 8: * WAIT - waits for specified # ms 9: * 10: 11: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 314: #endif 12: 13: * 14: ******************************************************************************* 15: * SUBROUTINE - WAIT 16: * Description: Waits for the designated amount of time (in ms) 17: * Input : # of ms to wait in reg X. 18: * Output : None. 19: * Destroys : None. 20: * Calls : None. 21: ******************************************************************************* 22: * 23: A03D 04 45 0F [03] WAIT TBEQ X,WAIT3 ; if no time to wait, get out 24: A040 34 [02] PSHX ; save reg X 25: A041 35 [02] PSHY ; save reg Y 26: 27: A042 CD 0239 [02] WAIT1 LDY #569 ; load loop counter 28: A045 A7 [01] WAIT2 NOP ; wait 29: A046 A7 [01] NOP ; wait 30: A047 04 36 FB [03] DBNE Y,WAIT2 ; repeat until counter=0 31: 32: A04A 04 35 F5 [03] DBNE X,WAIT1 ; if we need to wait more, go wait 33: 34: A04D 31 [03] PULY ; restore reg Y 35: A04E 30 [03] PULX ; restore reg X 36: A04F 3D [05] WAIT3 RTS ; return to caller 52: #include "sci.asm" 1: * Filename : SCI.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 4, 2002 4: * Version : 1.0 5: * Description : This file contains SCI communication 6: * functions for input and output of 7: * data. The following functions are 8: * available: 9: * 10: * WAIT_TC - wait for transmit complete 11: * SET_BAUD - change the baud rate 12: * TX_ON - turn transmitter on 13: * TX_OFF - turn transmitter off 14: * RX_ON - turn receiver on 15: * RX_OFF - turn receiver off 16: * RX_INT_ON - turn receiver interrupts on 17: * RX_INT_OFF - turn receiver interrupts off 18: * OUTCHAR - prints character to screen 19: * OUTSTR - prints string to screen 20: * INCHARWAIT - waits for character input 21: * INCHAR - get character input if any 22: * OUTNUM - prints number to screen 23: * NIBTOCHAR - prints nibble to screen 24: * OUTADDR - prints 16-bit num to screen 25: * INITSCI - turns on SCI for 9600 baud 26: * 27: * 28: *#define __DEBUGSCI_ 1 29: 30: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 314: #endif 31: 32: * 33: ************************************************************ 34: * SCI Equates 35: ************************************************************ 36: * 37: ****Baud rate equates**** 38: =00000000 BAUD19200 EQU 0 39: =00000002 BAUD14400 EQU 2 40: =00000004 BAUD9600 EQU 4 41: =00000006 BAUD4800 EQU 6 42: =00000008 BAUD2400 EQU 8 43: =0000000A BAUD1200 EQU 10 44: =0000000C BAUD600 EQU 12 45: =0000000E BAUD300 EQU 14 46: 47: ****ASCII character equates**** 48: =00000004 EOS EQU $04 ; User-defined End Of String (EOS) character 49: =0000000D CR EQU $0D ; Carriage Return Character 50: =0000000A LF EQU $0A ; Line Feed Character 51: =0000001B ESC EQU $1B ; ESC character 52: 53: * 54: ************************************************************ 55: * SCI Test Program 56: ************************************************************ 57: * 58: #ifdef __DEBUGSCI_ 105: #endif 106: * 107: ************************************************************ 108: * Constant Definitions 109: ************************************************************ 110: * 111: A050 000D BAUDTBL DC.W 13 ; (0) BAUD rate = 19200 112: A052 0011 DC.W 17 ; (1) BAUD rate = 14400 113: A054 001A DC.W 26 ; (2) BAUD rate = 9600 114: A056 0034 DC.W 52 ; (3) BAUD rate = 4800 115: A058 0068 DC.W 104 ; (4) BAUD rate = 2400 116: A05A 00D0 DC.W 208 ; (5) BAUD rate = 1200 117: A05C 01A1 DC.W 417 ; (6) BAUD rate = 600 118: A05E 0341 DC.W 833 ; (7) BAUD rate = 300 119: * 120: ******************************************************************************* 121: * SUBROUTINE - WAIT_TC 122: * Description: Waits for the current transmit operation to complete (polls the 123: * TC flag in SCI status register 1) 124: * Input : None. 125: * Output : None. 126: * Destroys : None. 127: * Calls : None. 128: ******************************************************************************* 129: * 130: A060 WAIT_TC 131: A060 4F C4 40 FC [04] BRCLR SC0SR1,BIT6,WAIT_TC ; wait until done sending 132: A064 3D [05] RTS ; Return to caller 133: * 134: * 135: ******************************************************************************* 136: * SUBROUTINE - SET_BAUD 137: * Description: Sets the baud rate to the rate specified in register A. Reg A 138: * can only take on these predefined values: 139: * BAUD19200 = BAUD rate 19200 140: * BAUD14400 = BAUD rate 14400 141: * BAUD9600 = BAUD rate 9600 142: * BAUD4800 = BAUD rate 4800 143: * BAUD2400 = BAUD rate 2400 144: * BAUD1200 = BAUD rate 1200 145: * BAUD600 = BAUD rate 600 146: * BAUD300 = BAUD rate 300 147: * 148: * Input : New baud rate in reg A 149: * Output : None. 150: * Destroys : SC0BDH, SC0BDL. 151: * Calls : None. 152: ******************************************************************************* 153: * 154: A065 SET_BAUD 155: A065 34 [02] PSHX ; Preserve reg X 156: 157: A066 CE A050 [02] LDX #BAUDTBL ; Load address of baud table 158: A069 EE E4 [03] LDX A,X ; Load baud rate from table 159: A06B 5E C0 [02] STX SC0BD ; Set baud rate in register 160: 161: A06D 30 [03] PULX ; Restore reg X 162: A06E 3D [05] RTS ; Return to caller 163: * 164: ******************************************************************************* 165: * SUBROUTINE - TX_ON, TX_OFF 166: * Description: Enables transmitter, disables transmitter 167: * Input : None. 168: * Output : None. 169: * Destroys : SC0CR2. 170: * Calls : None. 171: ******************************************************************************* 172: * 173: A06F TX_ON 174: A06F 4C C3 08 [04] BSET SC0CR2,BIT3 ; turn on the transmitter 175: A072 3D [05] RTS ; return to caller 176: A073 TX_OFF 177: A073 4D C3 08 [04] BCLR SC0CR2,BIT3 ; turn off the transmitter 178: A076 3D [05] RTS ; return to caller 179: * 180: ******************************************************************************* 181: * SUBROUTINE - RX_ON, RX_OFF,RX_INT_ON,RX_INT_OFF 182: * Description: Enables receiver, disables receiver, enables receive interrupts, 183: * disables receive interrupts 184: * Input : None. 185: * Output : None. 186: * Destroys : SC0CR2. 187: * Calls : None. 188: ******************************************************************************* 189: * 190: A077 RX_ON 191: A077 4C C3 04 [04] BSET SC0CR2,BIT2 ; turn on the receiver 192: A07A 3D [05] RTS ; return to caller 193: A07B RX_OFF 194: A07B 4D C3 04 [04] BCLR SC0CR2,BIT2 ; turn off the receiver 195: A07E 3D [05] RTS ; return to caller 196: A07F RX_INT_ON 197: A07F 4C C3 20 [04] BSET SC0CR2,BIT5 ; enable receiver interrupts 198: A082 3D [05] RTS ; return to caller 199: A083 RX_INT_OFF 200: A083 4D C3 20 [04] BCLR SC0CR2,BIT5 ; disable receiver interrupts 201: A086 3D [05] RTS ; return to caller 202: * 203: ************************************************************************ 204: * SUBROUTINE - OUTCHAR 205: * Description: Outputs the character in register A to the screen 206: * Input : Data to be transmitted in register A. 207: * Output : Transmits the data. 208: * Destroys : None. 209: * Calls : WAIT_TC 210: ************************************************************************ 211: * 212: A087 OUTCHAR 213: A087 16 A060 [04] JSR WAIT_TC ; wait until transmitter is idle 214: A08A 5A C7 [02] STAA SC0DRL ; output character 215: A08C 3D [05] RTS ; Return from subtoutine 216: * 217: ************************************************************************ 218: * SUBROUTINE - OUTSTR 219: * Description: Outputs the string pointed to by X. String must be 220: * terminated by EOS character. 221: * Input : String to be output in reg X 222: * Output : Transmits the string. 223: * Destroys : None. 224: * Calls : OUTCHAR 225: ************************************************************************ 226: * 227: A08D OUTSTR 228: A08D 36 [02] PSHA ; preserve reg A 229: A08E 34 [02] PSHX ; preserve reg X 230: A08F OUTSTR1 231: A08F A6 30 [03] LDAA 1,X+ ; Get a character (put in reg A) 232: A091 81 04 [01] CMPA #EOS ; Check if it's EOS 233: A093 27 05 [03] BEQ OUTSTR2 ; Branch to Done if it's EOS 234: A095 16 A087 [04] JSR OUTCHAR ; Print the character 235: A098 20 F5 [03] BRA OUTSTR1 236: A09A OUTSTR2 237: A09A 30 [03] PULX ; restore reg X 238: A09B 32 [03] PULA ; restore reg A 239: A09C 3D [05] RTS ; Return from subtoutine 240: * 241: ************************************************************************ 242: * SUBROUTINE - INCHARWAIT 243: * Description: Waits for a character to be pressed and reads it into 244: * reg A 245: * Input : None 246: * Output : Character pressed in reg. A 247: * Destroys : A. 248: * Calls : None 249: ************************************************************************ 250: * 251: A09D INCHARWAIT 252: A09D 4F C4 20 FC [04] BRCLR SC0SR1,BIT5,INCHARWAIT ; wait until buffer full 253: A0A1 96 C7 [03] LDAA SC0DRL ; input character 254: A0A3 3D [05] RTS ; Return from subroutine 255: * 256: ************************************************************************ 257: * SUBROUTINE - INCHAR 258: * Description: Checks to see if character recevied - if so returns the 259: * character, if not returns 0 260: * Input : None 261: * Output : Character pressed in reg A; 0 if none 262: * Destroys : A. 263: * Calls : None 264: ************************************************************************ 265: * 266: A0A4 INCHAR 267: A0A4 4F C4 20 02 [04] BRCLR SC0SR1,BIT5,INCHAR1 ; if there is no data, get out 268: A0A8 96 C7 [03] LDAA SC0DRL ; yes, read data 269: A0AA INCHAR1 270: A0AA 3D [05] RTS ; return to caller 271: * 272: ************************************************************************ 273: * SUBROUTINE - OUTNUM 274: * Description: Outputs the number in register A to the screen 275: * Input : Data to be transmitted in register A. 276: * Output : Transmits the data. 277: * Destroys : None. 278: * Calls : NIBTOCHAR 279: ************************************************************************ 280: * 281: A0AB OUTNUM 282: A0AB 36 [02] PSHA ; preserve reg A 283: A0AC 36 [02] PSHA ; preserve reg A 284: A0AD 84 F0 [01] ANDA #%11110000 ; get upper nibble 285: A0AF 44 [01] LSRA ; shift it right to get the nibble 286: A0B0 44 [01] LSRA 287: A0B1 44 [01] LSRA 288: A0B2 44 [01] LSRA 289: A0B3 16 A0BE [04] JSR NIBTOCHAR ; change A and print it 290: A0B6 32 [03] PULA ; restore reg A 291: A0B7 84 0F [01] ANDA #%00001111 ; get lower nibble 292: A0B9 16 A0BE [04] JSR NIBTOCHAR ; change A and print it 293: A0BC 32 [03] PULA ; restore reg A 294: A0BD 3D [05] RTS ; return to caller 295: * 296: ************************************************************************ 297: * SUBROUTINE - NIBTOCHAR 298: * Description: Converts lower nibble of A to ASCII and prints it 299: * Input : Data to convert in A. 300: * Output : Transmits the data. 301: * Destroys : None. 302: * Calls : OUTCHAR 303: ************************************************************************ 304: * 305: A0BE NIBTOCHAR 306: A0BE 81 09 [01] CMPA #9 ; is it greater than 9? 307: A0C0 2E 04 [03] BGT NIBTOCHAR1 ; if so, print a character 308: A0C2 8B 30 [01] ADDA #48 ; if not, print a number starting at 48 ASCII 309: A0C4 20 02 [03] BRA NIBTOCHAR2 ; 310: A0C6 NIBTOCHAR1 311: A0C6 8B 37 [01] ADDA #55 ; if so, print a letter starting at 55 = 65-10 312: A0C8 NIBTOCHAR2 313: A0C8 16 A087 [04] JSR OUTCHAR ; print it 314: A0CB 3D [05] RTS 315: * 316: ************************************************************************ 317: * SUBROUTINE - OUTADDR 318: * Description: Outputs the number in reg X to the screen 319: * Input : Data to print in X. 320: * Output : Transmits the data. 321: * Destroys : None. 322: * Calls : OUTNUM 323: ************************************************************************ 324: * 325: A0CC OUTADDR 326: A0CC 3B [02] PSHD ; save reg D 327: A0CD B7 54 [01] TFR X,D ; load X into D 328: A0CF 16 A0AB [04] JSR OUTNUM ; prints whats in A -- MSB 329: A0D2 180F [02] TBA ; B -> A 330: A0D4 16 A0AB [04] JSR OUTNUM ; prints whats in B -- LSB 331: A0D7 3A [03] PULD ; restore D 332: A0D8 3D [05] RTS ; return to caller 333: * 334: ************************************************************************ 335: * SUBROUTINE - INITSCI 336: * Description: This subroutine initializes the BAUD rate to 9600 and 337: * sets up the SCI port for 1 start bit, 8 data bits and 338: * 1 stop bit. It also enables the transmitter and receiver 339: * Input : None. 340: * Output : Initializes SCI. 341: * Destroys : None. 342: * Calls : SET_BAUD,TX_ON,RX_ON 343: ************************************************************************ 344: * 345: A0D9 36 [02] INITSCI PSHA ; save reg A 346: A0DA 86 04 [01] LDAA #BAUD9600 ; set the baud rate to 9600 347: A0DC 16 A065 [04] JSR SET_BAUD ; 348: A0DF 16 A06F [04] JSR TX_ON ; turn on the transmitter 349: A0E2 16 A077 [04] JSR RX_ON ; turn on the receiver 350: A0E5 32 [03] PULA ; restore reg A 351: A0E6 3D [05] RTS ; Return from subtoutine 352: * 353: ************************************************************************ 53: #include "atd.asm" 1: * Filename : ATD.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 22, 2002 4: * Version : 1.0 5: * Description : This file contains the Analog to 6: * Digital (A/D) conversion functions 7: * for the input of analog signals. The 8: * following functions are available: 9: * 10: * 11: * 12: *#define __DEBUGATD_ 1 13: 14: 15: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 314: #endif 16: * 17: ************************************************************ 18: * A/D Equates 19: ************************************************************ 20: * 21: =00000000 CHANNEL0 EQU $00 22: =00000001 CHANNEL1 EQU $01 23: =00000002 CHANNEL2 EQU $02 24: =00000003 CHANNEL3 EQU $03 25: =00000004 CHANNEL4 EQU $04 26: =00000005 CHANNEL5 EQU $05 27: =00000006 CHANNEL6 EQU $06 28: =00000007 CHANNEL7 EQU $07 29: * 30: ************************************************************ 31: * A/D Channel Assignments 32: ************************************************************ 33: * 34: =00000000 LEFTIR EQU CHANNEL0 35: =00000001 RIGHTIR EQU CHANNEL1 36: =00000002 CENTERIR EQU CHANNEL2 37: =00000005 LEFTFOLLOW EQU CHANNEL5 38: =00000006 RIGHTFOLLOW EQU CHANNEL6 39: =00000007 BUMPER EQU CHANNEL7 40: * 41: ************************************************************ 42: * A/D Debug Code 43: ************************************************************ 44: * 45: #ifdef __DEBUGATD_ 90: #endif 91: * 92: ******************************************************************************* 93: * SUBROUTINE - INITATD 94: * Description: Initializes the analog to digital converter 95: * Input : None. 96: * Output : None. 97: * Destroys : None. 98: * Calls : None. 99: ******************************************************************************* 100: * 101: A0E7 36 [02] INITATD PSHA ; save reg A 102: A0E8 180B 80 0062 [04] MOVB #$80,ATDCTL2 ; turn on ATD system 103: A0ED 180B 00 0063 [04] MOVB #$00,ATDCTL3 ; enable conversions in bgnd mode 104: A0F2 180B 01 0064 [04] MOVB #$01,ATDCTL4 ; setup conversion rate = 2MHz 105: 106: A0F7 86 C3 [01] LDAA #195 ; load loop counter 107: A0F9 A7 [01] INITATD1 NOP ; wait for ATD to power up 108: A0FA 04 30 FC [03] DBNE A,INITATD1 ; if we still need to wait, wait 109: 110: A0FD 32 [03] PULA ; restore reg A 111: A0FE 3D [05] RTS ; return to caller 112: * 113: ******************************************************************************* 114: * SUBROUTINE - ANALOG 115: * Description: Converts the analog channel specified by reg A and returns the 116: * converted value in reg A. Valid values for channel are (the 117: * equates an be found above): 118: * 119: * CHANNEL0 - A/D Channel #0 120: * CHANNEL1 - A/D Channel #1 121: * CHANNEL2 - A/D Channel #2 122: * CHANNEL3 - A/D Channel #3 123: * CHANNEL4 - A/D Channel #4 124: * CHANNEL5 - A/D Channel #5 125: * CHANNEL6 - A/D Channel #6 126: * CHANNEL7 - A/D Channel #7 127: * 128: * Input : Channel to convert in reg A. 129: * Output : Digital value of channel in reg A. 130: * Destroys : None. 131: * Calls : None. 132: ******************************************************************************* 133: * 134: A0FF 5A 65 [02] ANALOG STAA ATDCTL5 ; start conversion on channel specified 135: A101 4F 66 80 FC [04] ANALOG1 BRCLR ATDSTATH,BIT7,ANALOG1 ; wait for conversion to complete 136: A105 96 74 [03] LDAA ADR2H ; load conversion result 137: A107 3D [05] RTS ; return to caller 138: * 139: ************************************************************************ 54: 55: #endif 56: 57: * Reaction table for values for center IR 58: ************************************************************ 59: A108 00 BUMPTBL DC.B NOACTION ; $00-$07 60: A109 00 DC.B NOACTION ; $08-$0F 61: A10A 00 DC.B NOACTION ; $10-$17 62: A10B 00 DC.B NOACTION ; $18-$1F 63: A10C 00 DC.B NOACTION ; $20-$27 64: A10D 00 DC.B NOACTION ; $28-$2F 65: A10E 00 DC.B NOACTION ; $30-$37 66: A10F 00 DC.B NOACTION ; $38-$3F 67: A110 00 DC.B NOACTION ; $40-$47 68: A111 00 DC.B NOACTION ; $48-$4F 69: A112 00 DC.B NOACTION ; $50-$57 70: A113 00 DC.B NOACTION ; $58-$5F 71: A114 00 DC.B NOACTION ; $60-$67 72: A115 00 DC.B NOACTION ; $68-$6F 73: A116 00 DC.B NOACTION ; $70-$77 74: A117 00 DC.B NOACTION ; $78-$7F 75: A118 00 DC.B NOACTION ; $80-$87 76: A119 00 DC.B NOACTION ; $88-$8F 77: A11A 00 DC.B NOACTION ; $90-$97 78: A11B 00 DC.B NOACTION ; $98-$9F 79: A11C 00 DC.B NOACTION ; $A0-$A7 80: A11D 00 DC.B NOACTION ; $A8-$AF 81: A11E 00 DC.B NOACTION ; $B0-$B7 82: A11F 00 DC.B NOACTION ; $B8-$BF 83: A120 00 DC.B NOACTION ; $C0-$C7 84: A121 00 DC.B NOACTION ; $C8-$CF 85: A122 00 DC.B NOACTION ; $D0-$D7 86: A123 00 DC.B NOACTION ; $D8-$DF 87: A124 00 DC.B NOACTION ; $E0-$E7 88: A125 00 DC.B NOACTION ; $E8-$EF 89: A126 00 DC.B NOACTION ; $F0-$F7 90: A127 00 DC.B NOACTION ; $F8-$FF 91: 92: * 93: ******************************************************************************* 94: * SUBROUTINE - BUMPED 95: * Description: Determines if a bump sensor has been pressed. If it has, the 96: * function will return the value read from the bumper A/D port. 97: * If no bumper is pressed, a $00 will be returned. 98: * Input : None. 99: * Output : Bumper value in reg A. 100: * Destroys : Reg A. 101: * Calls : None. 102: ******************************************************************************* 103: * 104: A128 86 07 [01] BUMPED LDAA #BUMPER ; get data from bumper 105: A12A 16 A0FF [04] JSR ANALOG ; get the analog value of the port 106: A12D 3D [05] RTS ; return to caller 107: * 108: ******************************************************************************* 109: * SUBROUTINE - BUMPREACT 110: * Description: Determines if a bump sensor has been pressed. If it has, the 111: * function will return the value read from the bumper A/D port. 112: * If no bumper is pressed, a $00 will be returned. 113: * Input : None. 114: * Output : Reaction in reg A. 115: * Destroys : Reg A. 116: * Calls : None. 117: ******************************************************************************* 118: * 119: A12E 34 [02] BUMPREACT PSHX ; save register X 120: A12F CE A108 [02] LDX #BUMPTBL ; load address of bump reaction table 121: A132 16 A128 [04] JSR BUMPED ; get bumper value 122: A135 44 [01] LSRA ; convert bumper value 123: A136 44 [01] LSRA ; into an index for 124: A137 44 [01] LSRA ; reaction table 125: A138 A6 E4 [03] LDAA A,X ; get reaction from table 126: A13A 30 [03] PULX ; restore register X 127: A13B 3D [05] RTS ; return to caller 128: * 129: *******************************************************************************