* Filename : HC12.H * Programmer : Michael Hattermann * Date : February 21, 2002 * Version : 1.0 * Description : This file contains equates for the HC12 * processor * * ************************************************************ * Register Equates ************************************************************ * #ifndef __HC12_ASM_ #define __HC12_ASM_ 1 IO_BASE EQU 0 PORTA EQU (IO_BASE + $00) PORTB EQU (IO_BASE + $01) DDRA EQU (IO_BASE + $02) DDRB EQU (IO_BASE + $03) PORTE EQU (IO_BASE + $08) DDRE EQU (IO_BASE + $09) PEAR EQU (IO_BASE + $0A) MODE EQU (IO_BASE + $0B) PUCR EQU (IO_BASE + $0C) RDRIV EQU (IO_BASE + $0D) INITRM EQU (IO_BASE + $10) INITRG EQU (IO_BASE + $11) INITEE EQU (IO_BASE + $12) MISC EQU (IO_BASE + $13) RTICTL EQU (IO_BASE + $14) RTIFLG EQU (IO_BASE + $15) COPCTL EQU (IO_BASE + $16) COPRST EQU (IO_BASE + $17) INTCR EQU (IO_BASE + $1E) HPRIO EQU (IO_BASE + $1F) BRKCT0 EQU (IO_BASE + $20) BRKCT1 EQU (IO_BASE + $21) BRKAH EQU (IO_BASE + $22) BRKAL EQU (IO_BASE + $23) BRKDH EQU (IO_BASE + $24) BRKDL EQU (IO_BASE + $25) PWCLK EQU (IO_BASE + $40) PWPOL EQU (IO_BASE + $41) PWEN EQU (IO_BASE + $42) PWPRES EQU (IO_BASE + $43) PWSCAL0 EQU (IO_BASE + $44) PWSCNT0 EQU (IO_BASE + $45) PWSCAL1 EQU (IO_BASE + $46) PWSCNT1 EQU (IO_BASE + $47) PWCNT0 EQU (IO_BASE + $48) PWCNT1 EQU (IO_BASE + $49) PWCNT2 EQU (IO_BASE + $4A) PWCNT3 EQU (IO_BASE + $4B) PWPER0 EQU (IO_BASE + $4C) PWPER1 EQU (IO_BASE + $4D) PWPER2 EQU (IO_BASE + $4E) PWPER3 EQU (IO_BASE + $4F) PWDTY0 EQU (IO_BASE + $50) PWDTY1 EQU (IO_BASE + $51) PWDTY2 EQU (IO_BASE + $52) PWDTY3 EQU (IO_BASE + $53) PWCTL EQU (IO_BASE + $54) PWTST EQU (IO_BASE + $55) PORTP EQU (IO_BASE + $56) DDRP EQU (IO_BASE + $57) ATDCTL0 EQU (IO_BASE + $60) ATDCTL1 EQU (IO_BASE + $61) ATDCTL2 EQU (IO_BASE + $62) ATDCTL3 EQU (IO_BASE + $63) ATDCTL4 EQU (IO_BASE + $64) ATDCTL5 EQU (IO_BASE + $65) ATDSTAT EQU (IO_BASE + $66) ATDSTATH EQU (IO_BASE + $66) ATDSTATL EQU (IO_BASE + $67) ATDTST EQU (IO_BASE + $68) ATDTSTH EQU (IO_BASE + $68) ATDTSTL EQU (IO_BASE + $69) PORTAD EQU (IO_BASE + $6F) ADR0 EQU (IO_BASE + $70) ADR0H EQU (IO_BASE + $70) ADR0L EQU (IO_BASE + $71) ADR1 EQU (IO_BASE + $72) ADR1H EQU (IO_BASE + $72) ADR1L EQU (IO_BASE + $73) ADR2 EQU (IO_BASE + $74) ADR2H EQU (IO_BASE + $74) ADR2L EQU (IO_BASE + $75) ADR3 EQU (IO_BASE + $76) ADR3H EQU (IO_BASE + $76) ADR3L EQU (IO_BASE + $77) ADR4 EQU (IO_BASE + $78) ADR4H EQU (IO_BASE + $78) ADR4L EQU (IO_BASE + $79) ADR5 EQU (IO_BASE + $7A) ADR5H EQU (IO_BASE + $7A) ADR5L EQU (IO_BASE + $7B) ADR6 EQU (IO_BASE + $7C) ADR6H EQU (IO_BASE + $7C) ADR6L EQU (IO_BASE + $7D) ADR7 EQU (IO_BASE + $7E) ADR7H EQU (IO_BASE + $7E) ADR7L EQU (IO_BASE + $7F) TIOS EQU (IO_BASE + $80) CFORC EQU (IO_BASE + $81) OC7M EQU (IO_BASE + $82) OC7D EQU (IO_BASE + $83) TCNT EQU (IO_BASE + $84) TCNTH EQU (IO_BASE + $84) TCNTL EQU (IO_BASE + $85) TSCR EQU (IO_BASE + $86) TCTL1 EQU (IO_BASE + $88) TCTL2 EQU (IO_BASE + $89) TCTL3 EQU (IO_BASE + $8A) TCTL4 EQU (IO_BASE + $8B) TMSK1 EQU (IO_BASE + $8C) TMSK2 EQU (IO_BASE + $8D) TFLG1 EQU (IO_BASE + $8E) TFLG2 EQU (IO_BASE + $8F) TC0 EQU (IO_BASE + $90) TC0H EQU (IO_BASE + $90) TC0L EQU (IO_BASE + $91) TC1 EQU (IO_BASE + $92) TC1H EQU (IO_BASE + $92) TC1L EQU (IO_BASE + $93) TC2 EQU (IO_BASE + $94) TC2H EQU (IO_BASE + $94) TC2L EQU (IO_BASE + $95) TC3 EQU (IO_BASE + $96) TC3H EQU (IO_BASE + $96) TC3L EQU (IO_BASE + $97) TC4 EQU (IO_BASE + $98) TC4H EQU (IO_BASE + $98) TC4L EQU (IO_BASE + $99) TC5 EQU (IO_BASE + $9A) TC5H EQU (IO_BASE + $9A) TC5L EQU (IO_BASE + $9B) TC6 EQU (IO_BASE + $9C) TC6H EQU (IO_BASE + $9C) TC6L EQU (IO_BASE + $9D) TC7 EQU (IO_BASE + $9E) TC7H EQU (IO_BASE + $9E) TC7L EQU (IO_BASE + $9F) PACTL EQU (IO_BASE + $A0) PAFLG EQU (IO_BASE + $A1) PACN3 EQU (IO_BASE + $A2) PACN2 EQU (IO_BASE + $A3) PACN1 EQU (IO_BASE + $A4) PACN0 EQU (IO_BASE + $A5) MCCTL EQU (IO_BASE + $A6) MCFLG EQU (IO_BASE + $A7) ICPACR EQU (IO_BASE + $A8) DLYCT EQU (IO_BASE + $A9) ICOVW EQU (IO_BASE + $AA) ICSYS EQU (IO_BASE + $AB) TIMTST EQU (IO_BASE + $AD) PORTT EQU (IO_BASE + $AE) DDRT EQU (IO_BASE + $AF) PBCTL EQU (IO_BASE + $B0) PBFLG EQU (IO_BASE + $B1) PA3H EQU (IO_BASE + $B2) PA2H EQU (IO_BASE + $B3) PA1H EQU (IO_BASE + $B4) PA0H EQU (IO_BASE + $B5) MCCNT EQU (IO_BASE + $B6) MCCNTH EQU (IO_BASE + $B6) MCCNTL EQU (IO_BASE + $B7) SC0BD EQU (IO_BASE + $C0) SC0BDH EQU (IO_BASE + $C0) SC0BDL EQU (IO_BASE + $C1) SC0CR1 EQU (IO_BASE + $C2) SC0CR2 EQU (IO_BASE + $C3) SC0SR1 EQU (IO_BASE + $C4) SC0SR2 EQU (IO_BASE + $C5) SC0DRH EQU (IO_BASE + $C6) SC0DRL EQU (IO_BASE + $C7) SP0CR1 EQU (IO_BASE + $D0) SP0CR2 EQU (IO_BASE + $D1) SP0BR EQU (IO_BASE + $D2) SP0SR EQU (IO_BASE + $D3) SP0DR EQU (IO_BASE + $D5) PORTS EQU (IO_BASE + $D6) DDRS EQU (IO_BASE + $D7) PURDS EQU (IO_BASE + $DB) SLOW EQU (IO_BASE + $E0) EEMCR EQU (IO_BASE + $F0) EEPROT EQU (IO_BASE + $F1) EETST EQU (IO_BASE + $F2) EEPROG EQU (IO_BASE + $F3) FEELCK EQU (IO_BASE + $F4) FEEMCR EQU (IO_BASE + $F5) FEETST EQU (IO_BASE + $F6) FEECTL EQU (IO_BASE + $F7) BCR1 EQU (IO_BASE + $F8) BSVR EQU (IO_BASE + $F9) BCR2 EQU (IO_BASE + $FA) BDR EQU (IO_BASE + $FB) BARD EQU (IO_BASE + $FC) DLCSCR EQU (IO_BASE + $FD) PORTDLC EQU (IO_BASE + $FE) DDRDLC EQU (IO_BASE + $FF) * ************************************************************ * Interrupt vector addresses ************************************************************ * MOD_UNDER_IVECT EQU $FFCC PACB_OVER_IVECT EQU $FFCA BDLC_IVECT EQU $FFD0 ATD_IVECT EQU $FFD2 RES4_IVECT EQU $FFD4 SCI0_IVECT EQU $FFD6 SPI_TC_IVECT EQU $FFD8 PAC_IN_EDGE_IVECT EQU $FFDA PAC_OVER_IVECT EQU $FFDC TMR_OVER_IVECT EQU $FFDE T7_IVECT EQU $FFE0 T6_IVECT EQU $FFE2 T5_IVECT EQU $FFE4 T4_IVECT EQU $FFE6 T3_IVECT EQU $FFE8 T2_IVECT EQU $FFEA T1_IVECT EQU $FFEC T0_IVECT EQU $FFEE RTI_IVECT EQU $FFF0 IRQ_IVECT EQU $FFF0 XIRQ_IVECT EQU $FFF0 SWI_IVECT EQU $FFF0 TRAP_IVECT EQU $FFF0 COP_FAIL_IVECT EQU $FFF0 COP_CLK_FAIL_IVECT EQU $FFF0 RESET_IVECT EQU $FFF0 * ************************************************************ * Pseudointerrupt vector addresses ************************************************************ * MOD_UNDER_PVECT EQU $0800 PACB_OVER_PVECT EQU $0803 BDLC_PVECT EQU $0806 ATD_PVECT EQU $0809 SCI0_PVECT EQU $080C SPI_TC_PVECT EQU $080F PAC_IN_EDGE_PVECT EQU $0812 PAC_OVER_PVECT EQU $0815 TMR_OVER_PVECT EQU $0818 T7_PVECT EQU $081B T6_PVECT EQU $081E T5_PVECT EQU $0821 T4_PVECT EQU $0824 T3_PVECT EQU $0827 T2_PVECT EQU $082A T1_PVECT EQU $082D T0_PVECT EQU $0830 RTI_PVECT EQU $0833 IRQ_PVECT EQU $0836 XIRQ_PVECT EQU $0839 SWI_PVECT EQU $083C TRAP_PVECT EQU $083F COP_FAIL_PVECT EQU $0842 COP_CLK_FAIL_PVECT EQU $0845 RESET_PVECT EQU $0848 USERPROG_PVECT EQU $084B * ************************************************************ * Bit Equates ************************************************************ * BIT0 EQU %00000001 ; bit 0 INV0 EQU %11111110 ; inverse of bit 0 BIT1 EQU %00000010 ; bit 1 INV1 EQU %11111101 ; inverse of bit 1 BIT2 EQU %00000100 ; bit 2 INV2 EQU %11111011 ; inverse of bit 2 BIT3 EQU %00001000 ; bit 3 INV3 EQU %11110111 ; inverse of bit 3 BIT4 EQU %00010000 ; bit 4 INV4 EQU %11101111 ; inverse of bit 4 BIT5 EQU %00100000 ; bit 5 INV5 EQU %11011111 ; inverse of bit 5 BIT6 EQU %01000000 ; bit 6 INV6 EQU %10111111 ; inverse of bit 6 BIT7 EQU %10000000 ; bit 7 INV7 EQU %01111111 ; inverse of bit 7 * ************************************************************ * Port Equates ************************************************************ * SEG7PORT EQU $4000 ; 7-segment display output port *OUT1PORT EQU $5000 ; Output port 1 LED1PORT EQU $6000 ; LED Output port 1 *LED2PORT EQU $7000 ; LED Output port 2 * IN1PORT EQU $4000 ; Input port 1 * IN2PORT EQU $5000 ; Input port 2 * ************************************************************ * STEVE Common System Equates ************************************************************ * * Object avoidance/following reaction equates ********************************************* REACTBACK EQU $01 ; Reaction values REACTHARD EQU $02 ; REACTSOFT EQU $03 ; NOACTION EQU $00 ; REACTRAND EQU $00 ; REACTLEFT EQU $01 ; REACTRIGHT EQU $02 ; #endif