time.lst - generated by MGTEK Assembler ASM12 V1.16 Build 101 for WIN32 (x86) - Wed Apr 17 18:42:56 2002 1: * Filename : TIME.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains time functions. The 6: * following functions are available: 7: * 8: * INITTIME - initialize timer system 9: * KILLTIME - shut down timer system 10: * WAITSPEED - waits for a speeder to go by 11: * FLASHON - turns on flashing lights 12: * FLASHOFF - turns off flashing lights 13: * SIRENON - turns on the siren 14: * SIRENOFF - turns off the siren 15: * LEFTSTS - handles left speed trap sensor 16: * RIGHTSTS - handles right speed trap sensor 17: * TIMEEXT - handles extended timer,flashing lights,siren 18: * UPDMOTORS - updates speed on motors 19: * SIREN - handles siren output 20: * 21: *#define __DEBUGTIME_ 1 22: =00000001 #define __PRINTTIME_ 1 23: 24: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 14: =00000001 #define __HC12_ASM_ 1 15: 16: =00000000 IO_BASE EQU 0 17: 18: =00000000 PORTA EQU (IO_BASE + $00) 19: =00000001 PORTB EQU (IO_BASE + $01) 20: =00000002 DDRA EQU (IO_BASE + $02) 21: =00000003 DDRB EQU (IO_BASE + $03) 22: =00000008 PORTE EQU (IO_BASE + $08) 23: =00000009 DDRE EQU (IO_BASE + $09) 24: =0000000A PEAR EQU (IO_BASE + $0A) 25: =0000000B MODE EQU (IO_BASE + $0B) 26: =0000000C PUCR EQU (IO_BASE + $0C) 27: =0000000D RDRIV EQU (IO_BASE + $0D) 28: =00000010 INITRM EQU (IO_BASE + $10) 29: =00000011 INITRG EQU (IO_BASE + $11) 30: =00000012 INITEE EQU (IO_BASE + $12) 31: =00000013 MISC EQU (IO_BASE + $13) 32: =00000014 RTICTL EQU (IO_BASE + $14) 33: =00000015 RTIFLG EQU (IO_BASE + $15) 34: =00000016 COPCTL EQU (IO_BASE + $16) 35: =00000017 COPRST EQU (IO_BASE + $17) 36: =0000001E INTCR EQU (IO_BASE + $1E) 37: =0000001F HPRIO EQU (IO_BASE + $1F) 38: =00000020 BRKCT0 EQU (IO_BASE + $20) 39: =00000021 BRKCT1 EQU (IO_BASE + $21) 40: =00000022 BRKAH EQU (IO_BASE + $22) 41: =00000023 BRKAL EQU (IO_BASE + $23) 42: =00000024 BRKDH EQU (IO_BASE + $24) 43: =00000025 BRKDL EQU (IO_BASE + $25) 44: =00000040 PWCLK EQU (IO_BASE + $40) 45: =00000041 PWPOL EQU (IO_BASE + $41) 46: =00000042 PWEN EQU (IO_BASE + $42) 47: =00000043 PWPRES EQU (IO_BASE + $43) 48: =00000044 PWSCAL0 EQU (IO_BASE + $44) 49: =00000045 PWSCNT0 EQU (IO_BASE + $45) 50: =00000046 PWSCAL1 EQU (IO_BASE + $46) 51: =00000047 PWSCNT1 EQU (IO_BASE + $47) 52: =00000048 PWCNT0 EQU (IO_BASE + $48) 53: =00000049 PWCNT1 EQU (IO_BASE + $49) 54: =0000004A PWCNT2 EQU (IO_BASE + $4A) 55: =0000004B PWCNT3 EQU (IO_BASE + $4B) 56: =0000004C PWPER0 EQU (IO_BASE + $4C) 57: =0000004D PWPER1 EQU (IO_BASE + $4D) 58: =0000004E PWPER2 EQU (IO_BASE + $4E) 59: =0000004F PWPER3 EQU (IO_BASE + $4F) 60: =00000050 PWDTY0 EQU (IO_BASE + $50) 61: =00000051 PWDTY1 EQU (IO_BASE + $51) 62: =00000052 PWDTY2 EQU (IO_BASE + $52) 63: =00000053 PWDTY3 EQU (IO_BASE + $53) 64: =00000054 PWCTL EQU (IO_BASE + $54) 65: =00000055 PWTST EQU (IO_BASE + $55) 66: =00000056 PORTP EQU (IO_BASE + $56) 67: =00000057 DDRP EQU (IO_BASE + $57) 68: =00000060 ATDCTL0 EQU (IO_BASE + $60) 69: =00000061 ATDCTL1 EQU (IO_BASE + $61) 70: =00000062 ATDCTL2 EQU (IO_BASE + $62) 71: =00000063 ATDCTL3 EQU (IO_BASE + $63) 72: =00000064 ATDCTL4 EQU (IO_BASE + $64) 73: =00000065 ATDCTL5 EQU (IO_BASE + $65) 74: =00000066 ATDSTAT EQU (IO_BASE + $66) 75: =00000066 ATDSTATH EQU (IO_BASE + $66) 76: =00000067 ATDSTATL EQU (IO_BASE + $67) 77: =00000068 ATDTST EQU (IO_BASE + $68) 78: =00000068 ATDTSTH EQU (IO_BASE + $68) 79: =00000069 ATDTSTL EQU (IO_BASE + $69) 80: =0000006F PORTAD EQU (IO_BASE + $6F) 81: =00000070 ADR0 EQU (IO_BASE + $70) 82: =00000070 ADR0H EQU (IO_BASE + $70) 83: =00000071 ADR0L EQU (IO_BASE + $71) 84: =00000072 ADR1 EQU (IO_BASE + $72) 85: =00000072 ADR1H EQU (IO_BASE + $72) 86: =00000073 ADR1L EQU (IO_BASE + $73) 87: =00000074 ADR2 EQU (IO_BASE + $74) 88: =00000074 ADR2H EQU (IO_BASE + $74) 89: =00000075 ADR2L EQU (IO_BASE + $75) 90: =00000076 ADR3 EQU (IO_BASE + $76) 91: =00000076 ADR3H EQU (IO_BASE + $76) 92: =00000077 ADR3L EQU (IO_BASE + $77) 93: =00000078 ADR4 EQU (IO_BASE + $78) 94: =00000078 ADR4H EQU (IO_BASE + $78) 95: =00000079 ADR4L EQU (IO_BASE + $79) 96: =0000007A ADR5 EQU (IO_BASE + $7A) 97: =0000007A ADR5H EQU (IO_BASE + $7A) 98: =0000007B ADR5L EQU (IO_BASE + $7B) 99: =0000007C ADR6 EQU (IO_BASE + $7C) 100: =0000007C ADR6H EQU (IO_BASE + $7C) 101: =0000007D ADR6L EQU (IO_BASE + $7D) 102: =0000007E ADR7 EQU (IO_BASE + $7E) 103: =0000007E ADR7H EQU (IO_BASE + $7E) 104: =0000007F ADR7L EQU (IO_BASE + $7F) 105: =00000080 TIOS EQU (IO_BASE + $80) 106: =00000081 CFORC EQU (IO_BASE + $81) 107: =00000082 OC7M EQU (IO_BASE + $82) 108: =00000083 OC7D EQU (IO_BASE + $83) 109: =00000084 TCNT EQU (IO_BASE + $84) 110: =00000084 TCNTH EQU (IO_BASE + $84) 111: =00000085 TCNTL EQU (IO_BASE + $85) 112: =00000086 TSCR EQU (IO_BASE + $86) 113: =00000088 TCTL1 EQU (IO_BASE + $88) 114: =00000089 TCTL2 EQU (IO_BASE + $89) 115: =0000008A TCTL3 EQU (IO_BASE + $8A) 116: =0000008B TCTL4 EQU (IO_BASE + $8B) 117: =0000008C TMSK1 EQU (IO_BASE + $8C) 118: =0000008D TMSK2 EQU (IO_BASE + $8D) 119: =0000008E TFLG1 EQU (IO_BASE + $8E) 120: =0000008F TFLG2 EQU (IO_BASE + $8F) 121: =00000090 TC0 EQU (IO_BASE + $90) 122: =00000090 TC0H EQU (IO_BASE + $90) 123: =00000091 TC0L EQU (IO_BASE + $91) 124: =00000092 TC1 EQU (IO_BASE + $92) 125: =00000092 TC1H EQU (IO_BASE + $92) 126: =00000093 TC1L EQU (IO_BASE + $93) 127: =00000094 TC2 EQU (IO_BASE + $94) 128: =00000094 TC2H EQU (IO_BASE + $94) 129: =00000095 TC2L EQU (IO_BASE + $95) 130: =00000096 TC3 EQU (IO_BASE + $96) 131: =00000096 TC3H EQU (IO_BASE + $96) 132: =00000097 TC3L EQU (IO_BASE + $97) 133: =00000098 TC4 EQU (IO_BASE + $98) 134: =00000098 TC4H EQU (IO_BASE + $98) 135: =00000099 TC4L EQU (IO_BASE + $99) 136: =0000009A TC5 EQU (IO_BASE + $9A) 137: =0000009A TC5H EQU (IO_BASE + $9A) 138: =0000009B TC5L EQU (IO_BASE + $9B) 139: =0000009C TC6 EQU (IO_BASE + $9C) 140: =0000009C TC6H EQU (IO_BASE + $9C) 141: =0000009D TC6L EQU (IO_BASE + $9D) 142: =0000009E TC7 EQU (IO_BASE + $9E) 143: =0000009E TC7H EQU (IO_BASE + $9E) 144: =0000009F TC7L EQU (IO_BASE + $9F) 145: =000000A0 PACTL EQU (IO_BASE + $A0) 146: =000000A1 PAFLG EQU (IO_BASE + $A1) 147: =000000A2 PACN3 EQU (IO_BASE + $A2) 148: =000000A3 PACN2 EQU (IO_BASE + $A3) 149: =000000A4 PACN1 EQU (IO_BASE + $A4) 150: =000000A5 PACN0 EQU (IO_BASE + $A5) 151: =000000A6 MCCTL EQU (IO_BASE + $A6) 152: =000000A7 MCFLG EQU (IO_BASE + $A7) 153: =000000A8 ICPACR EQU (IO_BASE + $A8) 154: =000000A9 DLYCT EQU (IO_BASE + $A9) 155: =000000AA ICOVW EQU (IO_BASE + $AA) 156: =000000AB ICSYS EQU (IO_BASE + $AB) 157: =000000AD TIMTST EQU (IO_BASE + $AD) 158: =000000AE PORTT EQU (IO_BASE + $AE) 159: =000000AF DDRT EQU (IO_BASE + $AF) 160: =000000B0 PBCTL EQU (IO_BASE + $B0) 161: =000000B1 PBFLG EQU (IO_BASE + $B1) 162: =000000B2 PA3H EQU (IO_BASE + $B2) 163: =000000B3 PA2H EQU (IO_BASE + $B3) 164: =000000B4 PA1H EQU (IO_BASE + $B4) 165: =000000B5 PA0H EQU (IO_BASE + $B5) 166: =000000B6 MCCNT EQU (IO_BASE + $B6) 167: =000000B6 MCCNTH EQU (IO_BASE + $B6) 168: =000000B7 MCCNTL EQU (IO_BASE + $B7) 169: =000000C0 SC0BD EQU (IO_BASE + $C0) 170: =000000C0 SC0BDH EQU (IO_BASE + $C0) 171: =000000C1 SC0BDL EQU (IO_BASE + $C1) 172: =000000C2 SC0CR1 EQU (IO_BASE + $C2) 173: =000000C3 SC0CR2 EQU (IO_BASE + $C3) 174: =000000C4 SC0SR1 EQU (IO_BASE + $C4) 175: =000000C5 SC0SR2 EQU (IO_BASE + $C5) 176: =000000C6 SC0DRH EQU (IO_BASE + $C6) 177: =000000C7 SC0DRL EQU (IO_BASE + $C7) 178: =000000D0 SP0CR1 EQU (IO_BASE + $D0) 179: =000000D1 SP0CR2 EQU (IO_BASE + $D1) 180: =000000D2 SP0BR EQU (IO_BASE + $D2) 181: =000000D3 SP0SR EQU (IO_BASE + $D3) 182: =000000D5 SP0DR EQU (IO_BASE + $D5) 183: =000000D6 PORTS EQU (IO_BASE + $D6) 184: =000000D7 DDRS EQU (IO_BASE + $D7) 185: =000000DB PURDS EQU (IO_BASE + $DB) 186: =000000E0 SLOW EQU (IO_BASE + $E0) 187: =000000F0 EEMCR EQU (IO_BASE + $F0) 188: =000000F1 EEPROT EQU (IO_BASE + $F1) 189: =000000F2 EETST EQU (IO_BASE + $F2) 190: =000000F3 EEPROG EQU (IO_BASE + $F3) 191: =000000F4 FEELCK EQU (IO_BASE + $F4) 192: =000000F5 FEEMCR EQU (IO_BASE + $F5) 193: =000000F6 FEETST EQU (IO_BASE + $F6) 194: =000000F7 FEECTL EQU (IO_BASE + $F7) 195: =000000F8 BCR1 EQU (IO_BASE + $F8) 196: =000000F9 BSVR EQU (IO_BASE + $F9) 197: =000000FA BCR2 EQU (IO_BASE + $FA) 198: =000000FB BDR EQU (IO_BASE + $FB) 199: =000000FC BARD EQU (IO_BASE + $FC) 200: =000000FD DLCSCR EQU (IO_BASE + $FD) 201: =000000FE PORTDLC EQU (IO_BASE + $FE) 202: =000000FF DDRDLC EQU (IO_BASE + $FF) 203: * 204: ************************************************************ 205: * Interrupt vector addresses 206: ************************************************************ 207: * 208: =0000FFCC MOD_UNDER_IVECT EQU $FFCC 209: =0000FFCA PACB_OVER_IVECT EQU $FFCA 210: =0000FFD0 BDLC_IVECT EQU $FFD0 211: =0000FFD2 ATD_IVECT EQU $FFD2 212: =0000FFD4 RES4_IVECT EQU $FFD4 213: =0000FFD6 SCI0_IVECT EQU $FFD6 214: =0000FFD8 SPI_TC_IVECT EQU $FFD8 215: =0000FFDA PAC_IN_EDGE_IVECT EQU $FFDA 216: =0000FFDC PAC_OVER_IVECT EQU $FFDC 217: =0000FFDE TMR_OVER_IVECT EQU $FFDE 218: =0000FFE0 T7_IVECT EQU $FFE0 219: =0000FFE2 T6_IVECT EQU $FFE2 220: =0000FFE4 T5_IVECT EQU $FFE4 221: =0000FFE6 T4_IVECT EQU $FFE6 222: =0000FFE8 T3_IVECT EQU $FFE8 223: =0000FFEA T2_IVECT EQU $FFEA 224: =0000FFEC T1_IVECT EQU $FFEC 225: =0000FFEE T0_IVECT EQU $FFEE 226: =0000FFF0 RTI_IVECT EQU $FFF0 227: =0000FFF0 IRQ_IVECT EQU $FFF0 228: =0000FFF0 XIRQ_IVECT EQU $FFF0 229: =0000FFF0 SWI_IVECT EQU $FFF0 230: =0000FFF0 TRAP_IVECT EQU $FFF0 231: =0000FFF0 COP_FAIL_IVECT EQU $FFF0 232: =0000FFF0 COP_CLK_FAIL_IVECT EQU $FFF0 233: =0000FFF0 RESET_IVECT EQU $FFF0 234: * 235: ************************************************************ 236: * Pseudointerrupt vector addresses 237: ************************************************************ 238: * 239: =00000800 MOD_UNDER_PVECT EQU $0800 240: =00000803 PACB_OVER_PVECT EQU $0803 241: =00000806 BDLC_PVECT EQU $0806 242: =00000809 ATD_PVECT EQU $0809 243: =0000080C SCI0_PVECT EQU $080C 244: =0000080F SPI_TC_PVECT EQU $080F 245: =00000812 PAC_IN_EDGE_PVECT EQU $0812 246: =00000815 PAC_OVER_PVECT EQU $0815 247: =00000818 TMR_OVER_PVECT EQU $0818 248: =0000081B T7_PVECT EQU $081B 249: =0000081E T6_PVECT EQU $081E 250: =00000821 T5_PVECT EQU $0821 251: =00000824 T4_PVECT EQU $0824 252: =00000827 T3_PVECT EQU $0827 253: =0000082A T2_PVECT EQU $082A 254: =0000082D T1_PVECT EQU $082D 255: =00000830 T0_PVECT EQU $0830 256: =00000833 RTI_PVECT EQU $0833 257: =00000836 IRQ_PVECT EQU $0836 258: =00000839 XIRQ_PVECT EQU $0839 259: =0000083C SWI_PVECT EQU $083C 260: =0000083F TRAP_PVECT EQU $083F 261: =00000842 COP_FAIL_PVECT EQU $0842 262: =00000845 COP_CLK_FAIL_PVECT EQU $0845 263: =00000848 RESET_PVECT EQU $0848 264: =0000084B USERPROG_PVECT EQU $084B 265: * 266: ************************************************************ 267: * Bit Equates 268: ************************************************************ 269: * 270: =00000001 BIT0 EQU %00000001 ; bit 0 271: =000000FE INV0 EQU %11111110 ; inverse of bit 0 272: =00000002 BIT1 EQU %00000010 ; bit 1 273: =000000FD INV1 EQU %11111101 ; inverse of bit 1 274: =00000004 BIT2 EQU %00000100 ; bit 2 275: =000000FB INV2 EQU %11111011 ; inverse of bit 2 276: =00000008 BIT3 EQU %00001000 ; bit 3 277: =000000F7 INV3 EQU %11110111 ; inverse of bit 3 278: =00000010 BIT4 EQU %00010000 ; bit 4 279: =000000EF INV4 EQU %11101111 ; inverse of bit 4 280: =00000020 BIT5 EQU %00100000 ; bit 5 281: =000000DF INV5 EQU %11011111 ; inverse of bit 5 282: =00000040 BIT6 EQU %01000000 ; bit 6 283: =000000BF INV6 EQU %10111111 ; inverse of bit 6 284: =00000080 BIT7 EQU %10000000 ; bit 7 285: =0000007F INV7 EQU %01111111 ; inverse of bit 7 286: * 287: ************************************************************ 288: * Port Equates 289: ************************************************************ 290: * 291: =00004000 SEG7PORT EQU $4000 ; 7-segment display output port 292: *OUT1PORT EQU $5000 ; Output port 1 293: =00006000 LED1PORT EQU $6000 ; LED Output port 1 294: *LED2PORT EQU $7000 ; LED Output port 2 295: * IN1PORT EQU $4000 ; Input port 1 296: * IN2PORT EQU $5000 ; Input port 2 297: * 298: ************************************************************ 299: * STEVE Common System Equates 300: ************************************************************ 301: * 302: 303: * Object avoidance/following reaction equates 304: ********************************************* 305: =00000001 REACTBACK EQU $01 ; Reaction values 306: =00000002 REACTHARD EQU $02 ; 307: =00000003 REACTSOFT EQU $03 ; 308: =00000000 NOACTION EQU $00 ; 309: 310: =00000000 REACTRAND EQU $00 ; 311: =00000001 REACTLEFT EQU $01 ; 312: =00000002 REACTRIGHT EQU $02 ; 313: 314: #endif 25: 26: * 27: ************************************************************ 28: * Time Equates 29: ************************************************************ 30: * 31: =00000001 LSPDFLAG EQU BIT0 ; Flags to indicate if a 32: =00000002 RSPDFLAG EQU BIT1 ; beam was broken 33: =00000003 BSPDFLAG EQU 3 ; 34: 35: =0000001F SPDLIMIT EQU $1F ; speed limit 36: =0000000F FLASHRATE EQU 15 ; flashing light rate (1/4 second) 37: =0000000F FLASHPAT1 EQU $0F ; 1st light pattern 38: =000000F0 FLASHPAT2 EQU $F0 ; 2nd light pattern 39: 40: =FFFFFFF6 SIRENRATE1 EQU -10 ; siren frequency change rate 41: =0000000A SIRENRATE2 EQU 10 ; siren frequency change rate 42: =000007D0 SIRENFREQ1 EQU 2000 ; first siren frequency 43: =000004B0 SIRENFREQ2 EQU 1200 ; second siren frequency 44: 45: * 46: ************************************************************ 47: * Time Debug Program 48: ************************************************************ 49: * 50: #ifdef __DEBUGTIME_ 113: #endif 114: * 115: ******************************************************************************* 116: * SUBROUTINE - INITTIME 117: * Description: Initializes the timer system 118: * TC0 - left speed trap IR receiver 119: * TC1 - right speed trap IR receiver 120: * TC6 - siren output 121: * Input : None. 122: * Output : None. 123: * Destroys : None. 124: * Calls : None. 125: ******************************************************************************* 126: * 127: 0000 180B 40 0080 [04] INITTIME MOVB #$40,TIOS ; setup input capture/output compare lines 128: 0005 180B 00 0081 [04] MOVB #$00,CFORC ; setup timer compare force register 129: 000A 180B 00 0082 [04] MOVB #$00,OC7M ; setup OC7 mask register 130: 000F 180B 00 0083 [04] MOVB #$00,OC7D ; setup OC7 data register 131: 0014 180B 00 0088 [04] MOVB #$00,TCTL1 ; setup output compare pin action reg 1 132: 0019 180B 00 0089 [04] MOVB #$00,TCTL2 ; setup output compare pin action reg 2 133: 001E 180B 00 008A [04] MOVB #$00,TCTL3 ; setup input capture edge detection reg 1 134: 0023 180B 05 008B [04] MOVB #$05,TCTL4 ; setup input capture edge detection reg 2 135: 0028 180B 03 008C [04] MOVB #$03,TMSK1 ; setup interrupts on timer lines 136: 002D 180B A0 008D [04] MOVB #$A0,TMSK2 ; setup misc timer pin options(pullups on IC pins) 137: 0032 1803 0000 0090 [05] MOVW #$0000,TC0 ; clear TC0 register 138: 0038 1803 0000 0092 [05] MOVW #$0000,TC1 ; clear TC1 register 139: 003E 1803 0000 0094 [05] MOVW #$0000,TC2 ; clear TC2 register 140: 0044 1803 0000 0096 [05] MOVW #$0000,TC3 ; clear TC3 register 141: 004A 1803 0000 0098 [05] MOVW #$0000,TC4 ; clear TC4 register 142: 0050 1803 0000 009A [05] MOVW #$0000,TC5 ; clear TC5 register 143: 0056 1803 0000 009C [05] MOVW #$0000,TC6 ; clear TC6 register 144: 005C 1803 0000 009E [05] MOVW #$0000,TC7 ; clear TC7 register 145: 0062 180B FF 008E [04] MOVB #$FF,TFLG1 ; clear all interrupt flags 146: 0067 180B 80 008F [04] MOVB #$80,TFLG2 ; clear interrupt flag time.asm(147): Error A2038: col(38) 'uppertimer': undefined symbol 147: MOVW #$0000,UPPERTIMER ; clear timer extension timer time.asm(148): Error A2038: col(39) 'leftspdtime': undefined symbol 148: MOVW #$0000,LEFTSPDTIME ; clear left speed time time.asm(149): Error A2038: col(40) 'rightspdtime': undefined symbol 149: MOVW #$0000,RIGHTSPDTIME ; clear left speed time time.asm(150): Error A2038: col(36) 'flashtimer': undefined symbol 150: MOVB #$00,FLASHTIMER ; clear flashing lights timer time.asm(151): Error A2038: col(36) 'spdtimeflg': undefined symbol 151: MOVB #$00,SPDTIMEFLG ; clear broken beam flags time.asm(152): Error A2038: col(35) 'spdcaught': undefined symbol 152: MOVB #$00,SPDCAUGHT ; clear speeder caught flag time.asm(153): Error A2038: col(35) 'flashprev': undefined symbol 153: MOVB #$00,FLASHPREV ; turn off flashing lights time.asm(154): Error A2038: col(37) 'sirenfreq': undefined symbol 154: MOVW #$0000,SIRENFREQ ; clear siren frequency time.asm(155): Error A2038: col(38) 'sirentimer': undefined symbol 155: MOVW #$0000,SIRENTIMER ; clear siren timer time.asm(156): Error A2038: col(35) 'bumpvalue': undefined symbol 156: MOVB #$00,BUMPVALUE ; clear bumper value 157: 006C 180B 86 0014 [04] MOVB #$86,RTICTL ; set up, enable RTI 158: 0071 180B FF 0015 [04] MOVB #$FF,RTIFLG ; clear all RTI flags 159: 0076 180B 80 0086 [04] MOVB #$80,TSCR ; enable the timer 160: 007B 3D [05] RTS ; return to caller 161: * 162: ******************************************************************************* 163: * SUBROUTINE - KILLTIME 164: * Description: Shuts down the timer system 165: * Input : None. 166: * Output : None. 167: * Destroys : None. 168: * Calls : None. 169: ******************************************************************************* 170: * 171: 007C 180B 00 0088 [04] KILLTIME MOVB #$00,TCTL1 ; disconnect all output compare pins 172: 0081 180B 00 0089 [04] MOVB #$00,TCTL2 ; 173: 0086 180B 00 008A [04] MOVB #$00,TCTL3 ; disable all input capture pins 174: 008B 180B 00 008B [04] MOVB #$00,TCTL4 ; 175: 0090 180B 00 008C [04] MOVB #$00,TMSK1 ; turn off interrupts 176: 0095 180B 00 008D [04] MOVB #$00,TMSK2 ; turn off timer overflow interrupts 177: 009A 180B 00 00A0 [04] MOVB #$00,PACTL ; turn off pulse accumulator 178: 009F 180B 00 0086 [04] MOVB #$00,TSCR ; turn off timer 179: 00A4 3D [05] RTS ; return to caller 180: * 181: ******************************************************************************* 182: * SUBROUTINE - WAITSPEED 183: * Description: Waits for a speeder to be caught and returns the direction the 184: * object was travelling (Reg A). Valid values are: 185: * LSPDFLAG - object was going left 186: * RSPDFLAG - object was going right 187: * 188: * Input : None. 189: * Output : Direction in reg A. 190: * Destroys : None. 191: * Calls : None. 192: ******************************************************************************* 193: * 194: 00A5 WAITSPEED time.asm(195): Error A2038: col(30) 'spdcaught': undefined symbol 195: 00A5 WAITSPEED1 LDAA SPDCAUGHT ; get flags for speeder caught 196: 00A5 04 50 FD [03] TBEQ A,WAITSPEED1 ; wait for a caught speeder 197: 00A8 4D 8C 01 [04] BCLR TMSK1,#BIT0 ; turn off left interrupts 198: 00AB 4D 8C FE [04] BCLR TMSK1,#$FE ; turn off right interrupts 199: 00AE 3D [05] RTS ; return to caller 200: * 201: ******************************************************************************* 202: * SUBROUTINE - FLASHON 203: * Description: Turns the flashing lights on 204: * Input : None. 205: * Output : None. 206: * Destroys : None. 207: * Calls : None. 208: ******************************************************************************* 209: * time.asm(210): Error A2038: col(41) 'flashprev': undefined symbol 210: 00AF FLASHON MOVB #FLASHPAT1,FLASHPREV ; turn on the lights 211: 00AF 3D [05] RTS ; return to caller 212: * 213: ******************************************************************************* 214: * SUBROUTINE - FLASHOFF 215: * Description: Turns the flashing lights off 216: * Input : None. 217: * Output : None. 218: * Destroys : None. 219: * Calls : None. 220: ******************************************************************************* 221: * time.asm(222): Error A2038: col(35) 'flashprev': undefined symbol 222: 00B0 FLASHOFF MOVB #$00,FLASHPREV ; turn off the lights 223: 00B0 3D [05] RTS ; return to caller 224: * 225: ******************************************************************************* 226: * SUBROUTINE - SIRENON 227: * Description: Turns the siren on 228: * Input : None. 229: * Output : None. 230: * Destroys : None. 231: * Calls : None. 232: ******************************************************************************* 233: * 234: 00B1 180B 10 0088 [04] SIRENON MOVB #$10,TCTL1 ; turn on pin action for siren 235: 00B6 4C 8C 40 [04] BSET TMSK1,#BIT6 ; turn on interrupts for siren time.asm(236): Error A2038: col(42) 'sirenfreq': undefined symbol 236: MOVW #SIRENFREQ1,SIRENFREQ ; initialize the siren frequency 237: time.asm(238): Error A2038: col(43) 'sirentimer': undefined symbol 238: MOVW #SIRENRATE1,SIRENTIMER ; start going up in frequency first 239: 240: 00B9 3D [05] RTS ; return to caller 241: * 242: ******************************************************************************* 243: * SUBROUTINE - SIRENOFF 244: * Description: Turns the siren off 245: * Input : None. 246: * Output : None. 247: * Destroys : None. 248: * Calls : None. 249: ******************************************************************************* 250: * 251: 00BA 4D 8C 40 [04] SIRENOFF BCLR TMSK1,#BIT6 ; turn off interrupts for siren 252: 00BD 180B 00 0088 [04] MOVB #$00,TCTL1 ; turn off pin action for siren time.asm(253): Error A2038: col(37) 'sirenfreq': undefined symbol 253: MOVW #$0000,SIRENFREQ ; clear siren frequency 254: 00C2 3D [05] RTS ; return to caller 255: * 256: ******************************************************************************* 257: * INTERRUPT SERVICE ROUTINE - LEFTSTS 258: * Description: Handles the processing for a signal received from the left 259: * speed trap sensor. 260: * Input : None. 261: * Output : None. 262: * Destroys : None. 263: * Calls : None. 264: ******************************************************************************* 265: * 266: 00C3 4F 8E 01 1C [04] LEFTSTS BRCLR TFLG1,BIT0,LEFTSTSX ; make sure we should be here 267: 00C7 180B 01 008E [04] MOVB #BIT0,TFLG1 ; clear the flag 268: 269: #ifdef __PRINTTIME_ 270: 00CC 34 [02] PSHX ; save reg X time.asm(271): Error A2038: col(31) 'leftspstr': undefined symbol 271: LDX #LEFTSPSTR ; print beam broken time.asm(272): Error A2038: col(27) 'outstr': undefined symbol 272: JSR OUTSTR ; 273: 00CD 30 [03] PULX ; restore X 274: #endif 275: time.asm(276): Error A2038: col(31) 'uppertimer': undefined symbol 276: MOVW UPPERTIMER,LEFTSPDTIME ; save time beam was broken time.asm(277): Error A2038: col(31) 'spdtimeflg': undefined symbol 277: LDAA SPDTIMEFLG ; load flags for broken beams 278: 00CE 8A 01 [01] ORAA #LSPDFLAG ; set the left flag 279: 00D0 81 03 [01] CMPA #BSPDFLAG ; have both beams been broken? 280: 00D2 27 02 [03] BEQ LEFTSTS1 ; yes, then go handle time.asm(281): Error A2038: col(31) 'spdtimeflg': undefined symbol 281: STAA SPDTIMEFLG ; no, save flags for borken beams 282: 00D4 20 0D [03] BRA LEFTSTSX ; get out 283: time.asm(284): Error A2038: col(36) 'spdtimeflg': undefined symbol 284: 00D6 LEFTSTS1 MOVB #$00,SPDTIMEFLG ; clear flags for broken beams time.asm(285): Error A2038: col(32) 'leftspdtime': undefined symbol 285: LDD LEFTSPDTIME ; get the left beam broken time time.asm(286): Error A2038: col(33) 'rightspdtime': undefined symbol 286: CPD RIGHTSPDTIME ; did the timer roll over 287: 00D6 25 02 [03] BLO LEFTSTS2 ; yes, so calc speed differently time.asm(288): Error A2038: col(33) 'rightspdtime': undefined symbol 288: SUBD RIGHTSPDTIME ; calculate time difference 289: 00D8 20 00 [03] BRA LEFTSTS3 290: time.asm(291): Error A2038: col(33) 'rightspdtime': undefined symbol 291: 00DA LEFTSTS2 LDD RIGHTSPDTIME ; load time right beam broken time.asm(292): Error A2038: col(32) 'leftspdtime': undefined symbol 292: SUBD LEFTSPDTIME ; calculate time difference 293: 294: 00DA 8C 001F [02] LEFTSTS3 CPD #SPDLIMIT ; was the object speeding? 295: 00DD 24 00 [03] BHS LEFTSTS4 ; no, so get out 296: time.asm(297): Error A2038: col(40) 'spdcaught': undefined symbol 297: MOVB #LSPDFLAG,SPDCAUGHT ; yes, set flag for speeder caught 298: 299: 00DF 51 [01] LEFTSTS4 COMB ; 300: 00E0 7B 4000 [03] STAB SEG7PORT ; write speed to port 301: 00E3 0B [08] LEFTSTSX RTI ; return from interrupt 302: * 303: ******************************************************************************* 304: * INTERRUPT SERVICE ROUTINE - RIGHTSTS 305: * Description: Handles the processing for a signal received from the right 306: * speed trap sensor. 307: * Input : None. 308: * Output : None. 309: * Destroys : None. 310: * Calls : None. 311: ******************************************************************************* 312: * 313: 00E4 4F 8E 02 1C [04] RIGHTSTS BRCLR TFLG1,BIT1,RIGHTSTSX ; make sure we should be here 314: 00E8 180B 02 008E [04] MOVB #BIT1,TFLG1 ; clear the flag 315: 316: #ifdef __PRINTTIME_ 317: 00ED 34 [02] PSHX ; save reg X time.asm(318): Error A2038: col(32) 'rightspstr': undefined symbol 318: LDX #RIGHTSPSTR ; print beam broken time.asm(319): Error A2038: col(27) 'outstr': undefined symbol 319: JSR OUTSTR ; 320: 00EE 30 [03] PULX ; restore reg X 321: #endif 322: time.asm(323): Error A2038: col(31) 'uppertimer': undefined symbol 323: MOVW UPPERTIMER,RIGHTSPDTIME ; save time beam was broken time.asm(324): Error A2038: col(31) 'spdtimeflg': undefined symbol 324: LDAA SPDTIMEFLG ; load flags for broken beams 325: 00EF 8A 02 [01] ORAA #RSPDFLAG ; set the right flag 326: 00F1 81 03 [01] CMPA #BSPDFLAG ; have both beams been broken? 327: 00F3 27 02 [03] BEQ RIGHTSTS1 ; yes, then go handle time.asm(328): Error A2038: col(31) 'spdtimeflg': undefined symbol 328: STAA SPDTIMEFLG ; no, save flags for borken beams 329: 00F5 20 0D [03] BRA RIGHTSTSX ; get out 330: time.asm(331): Error A2038: col(36) 'spdtimeflg': undefined symbol 331: 00F7 RIGHTSTS1 MOVB #$00,SPDTIMEFLG ; clear flags for broken beams time.asm(332): Error A2038: col(33) 'rightspdtime': undefined symbol 332: LDD RIGHTSPDTIME ; get the right beam broken time time.asm(333): Error A2038: col(32) 'leftspdtime': undefined symbol 333: CPD LEFTSPDTIME ; did the timer roll over 334: 00F7 25 02 [03] BLO RIGHTSTS2 ; yes, so calc speed differently time.asm(335): Error A2038: col(32) 'leftspdtime': undefined symbol 335: SUBD LEFTSPDTIME ; calculate time difference 336: 00F9 20 00 [03] BRA RIGHTSTS3 337: time.asm(338): Error A2038: col(32) 'leftspdtime': undefined symbol 338: 00FB RIGHTSTS2 LDD LEFTSPDTIME ; load time right beam broken time.asm(339): Error A2038: col(33) 'rightspdtime': undefined symbol 339: SUBD RIGHTSPDTIME ; calculate time difference 340: 341: 00FB 8C 001F [02] RIGHTSTS3 CPD #SPDLIMIT ; was the object speeding? 342: 00FE 24 00 [03] BHS RIGHTSTS4 ; no, so get out 343: time.asm(344): Error A2038: col(40) 'spdcaught': undefined symbol 344: MOVB #RSPDFLAG,SPDCAUGHT ; yes, set flag for speeder caught (going right) 345: 346: 0100 51 [01] RIGHTSTS4 COMB ; 347: 0101 7B 4000 [03] STAB SEG7PORT ; write speed to port 348: 0104 0B [08] RIGHTSTSX RTI ; return from interrupt 349: * 350: ******************************************************************************* 351: * INTERRUPT SERVICE ROUTINE - TIMEEXT 352: * Description: Increments the extended timer when a timer overflow occurs in 353: * TCNT (it is incremented every 8ms). 354: * Input : None. 355: * Output : None. 356: * Destroys : None. 357: * Calls : None. 358: ******************************************************************************* 359: * 360: 0105 4F 8F 80 1F [04] TIMEEXT BRCLR TFLG2,BIT7,TIMEEXTX ; make sure we should be here 361: 0109 180B 80 008F [04] MOVB #BIT7,TFLG2 ; clear the flag time.asm(362): Error A2038: col(31) 'uppertimer': undefined symbol 362: LDX UPPERTIMER ; get the timer extension 363: 010E 08 [01] INX ; increment the timer extension time.asm(364): Error A2038: col(31) 'uppertimer': undefined symbol 364: STX UPPERTIMER ; save the timer extension 365: time.asm(366): Error A2038: col(30) 'sirenfreq': undefined symbol 366: LDD SIRENFREQ ; get previous siren frequency 367: 010F 27 0C [03] BEQ TIMEEXT2 ; if siren off, keep it off 368: time.asm(369): Error A2038: col(31) 'sirentimer': undefined symbol 369: ADDD SIRENTIMER ; update siren frequency time.asm(370): Error A2038: col(30) 'sirenfreq': undefined symbol 370: STD SIRENFREQ ; save siren frequency 371: 372: 0111 8C 07D0 [02] CPD #SIRENFREQ1 ; are we at low end of range 373: 0114 25 02 [03] BLO TIMEEXT1 ; no, continue time.asm(374): Error A2038: col(43) 'sirentimer': undefined symbol 374: MOVW #SIRENRATE1,SIRENTIMER ; yes, so start going back up 375: 0116 20 05 [03] BRA TIMEEXT2 ; continue 376: 377: 0118 8C 04B0 [02] TIMEEXT1 CPD #SIRENFREQ2 ; are we at high end of range 378: 011B 22 00 [03] BHI TIMEEXT2 ; no, continue time.asm(379): Error A2038: col(43) 'sirentimer': undefined symbol 379: MOVW #SIRENRATE2,SIRENTIMER ; yes, so start going down 380: time.asm(381): Error A2038: col(30) 'flashprev': undefined symbol 381: 011D TIMEEXT2 LDAB FLASHPREV ; get previous status of lights 382: 011D 27 09 [03] BEQ TIMEEXTX ; if lights off, keep them off 383: time.asm(384): Error A2038: col(31) 'flashtimer': undefined symbol 384: LDAA FLASHTIMER ; get the flashing lights timer 385: 011F 42 [01] INCA ; increment the timer time.asm(386): Error A2038: col(31) 'flashtimer': undefined symbol 386: STAA FLASHTIMER ; save flashing lights timer 387: 0120 81 0F [01] CMPA #FLASHRATE ; do we need to change light status 388: 0122 26 04 [03] BNE TIMEEXTX ; no, so get out 389: 390: 0124 51 [01] COMB ; switch light pattern time.asm(391): Error A2038: col(30) 'flashprev': undefined symbol 391: STAB FLASHPREV ; save new light pattern 392: 0125 7B 6000 [03] STAB LED1PORT ; turn on lights with new pattern 393: time.asm(394): Error A2038: col(36) 'flashtimer': undefined symbol 394: MOVB #$00,FLASHTIMER ; reset flashing lights timer 395: 396: 0128 0B [08] TIMEEXTX RTI ; return from interrupt 397: * 398: ******************************************************************************* 399: * INTERRUPT SERVICE ROUTINE - UPDMOTORS 400: * Description: Updates the speed of the motors on every RTI interrupt 401: * Input : None. 402: * Output : None. 403: * Destroys : None. 404: * Calls : None. 405: ******************************************************************************* 406: * 407: 0129 4F 15 80 05 [04] UPDMOTORS BRCLR RTIFLG,BIT7,UPDMOTORSX ; make sure we should be here 408: 012D 180B 80 0015 [04] MOVB #BIT7,RTIFLG ; clear the flag 409: time.asm(410): Error A2038: col(30) 'leftmotor': undefined symbol 410: JSR LEFTMOTOR ; update speed on left motor time.asm(411): Error A2038: col(31) 'rightmotor': undefined symbol 411: JSR RIGHTMOTOR ; update speed on right motor 412: 413: 0132 0B [08] UPDMOTORSX RTI ; return from interrupt 414: * 415: ******************************************************************************* 416: * INTERRUPT SERVICE ROUTINE - SIREN 417: * Description: Handles generating the frequency of the siren 418: * Input : None. 419: * Output : None. 420: * Destroys : None. 421: * Calls : None. 422: ******************************************************************************* 423: * 424: 0133 4F 8E 40 09 [04] SIREN BRCLR TFLG1,BIT6,SIRENX ; make sure we should be here 425: 0137 180B 40 008E [04] MOVB #BIT6,TFLG1 ; clear the flag 426: 427: 013C DC 9C [03] LDD TC6 ; get previous interrupt time time.asm(428): Error A2038: col(30) 'sirenfreq': undefined symbol 428: ADDD SIRENFREQ ; calc next time (set frequency of siren) 429: 013E 5C 9C [02] STD TC6 ; set next interrupt time 430: 431: 0140 0B [08] SIRENX RTI ; return from interrupt 432: * 433: ******************************************************************************* Symbols: __hc12_asm_ 00000001 __printtime_ 00000001 adr0 00000070 adr0h 00000070 adr0l 00000071 adr1 00000072 adr1h 00000072 adr1l 00000073 adr2 00000074 adr2h 00000074 adr2l 00000075 adr3 00000076 adr3h 00000076 adr3l 00000077 adr4 00000078 adr4h 00000078 adr4l 00000079 adr5 0000007a adr5h 0000007a adr5l 0000007b adr6 0000007c adr6h 0000007c adr6l 0000007d adr7 0000007e adr7h 0000007e adr7l 0000007f atd_ivect 0000ffd2 atd_pvect 00000809 atdctl0 00000060 atdctl1 00000061 atdctl2 00000062 atdctl3 00000063 atdctl4 00000064 atdctl5 00000065 atdstat 00000066 atdstath 00000066 atdstatl 00000067 atdtst 00000068 atdtsth 00000068 atdtstl 00000069 bard 000000fc bcr1 000000f8 bcr2 000000fa bdlc_ivect 0000ffd0 bdlc_pvect 00000806 bdr 000000fb bit0 *00000001 bit1 *00000002 bit2 00000004 bit3 00000008 bit4 00000010 bit5 00000020 bit6 *00000040 bit7 *00000080 brkah 00000022 brkal 00000023 brkct0 00000020 brkct1 00000021 brkdh 00000024 brkdl 00000025 bspdflag *00000003 bsvr 000000f9 bumpvalue ?00000000 cforc *00000081 cop_clk_fail_ivect 0000fff0 cop_clk_fail_pvect 00000845 cop_fail_ivect 0000fff0 cop_fail_pvect 00000842 copctl 00000016 coprst 00000017 ddra 00000002 ddrb 00000003 ddrdlc 000000ff ddre 00000009 ddrp 00000057 ddrs 000000d7 ddrt 000000af dlcscr 000000fd dlyct 000000a9 eemcr 000000f0 eeprog 000000f3 eeprot 000000f1 eetst 000000f2 feectl 000000f7 feelck 000000f4 feemcr 000000f5 feetst 000000f6 flashoff 000000b0 flashon 000000af flashpat1 *0000000f flashpat2 000000f0 flashprev ?00000000 flashrate *0000000f flashtimer ?00000000 hprio 0000001f icovw 000000aa icpacr 000000a8 icsys 000000ab initee 00000012 initrg 00000011 initrm 00000010 inittime 00000000 intcr 0000001e inv0 000000fe inv1 000000fd inv2 000000fb inv3 000000f7 inv4 000000ef inv5 000000df inv6 000000bf inv7 0000007f io_base *00000000 irq_ivect 0000fff0 irq_pvect 00000836 killtime 0000007c led1port *00006000 leftmotor ?00000000 leftspdtime ?00000000 leftspstr ?00000000 leftsts 000000c3 leftsts1 *000000d6 leftsts2 *000000da leftsts3 *000000da leftsts4 *000000df leftstsx *000000e3 lspdflag *00000001 mccnt 000000b6 mccnth 000000b6 mccntl 000000b7 mcctl 000000a6 mcflg 000000a7 misc 00000013 mod_under_ivect 0000ffcc mod_under_pvect 00000800 mode 0000000b noaction 00000000 oc7d *00000083 oc7m *00000082 outstr ?00000000 pa0h 000000b5 pa1h 000000b4 pa2h 000000b3 pa3h 000000b2 pac_in_edge_ivect 0000ffda pac_in_edge_pvect 00000812 pac_over_ivect 0000ffdc pac_over_pvect 00000815 pacb_over_ivect 0000ffca pacb_over_pvect 00000803 pacn0 000000a5 pacn1 000000a4 pacn2 000000a3 pacn3 000000a2 pactl *000000a0 paflg 000000a1 pbctl 000000b0 pbflg 000000b1 pear 0000000a porta 00000000 portad 0000006f portb 00000001 portdlc 000000fe porte 00000008 portp 00000056 ports 000000d6 portt 000000ae pucr 0000000c purds 000000db pwclk 00000040 pwcnt0 00000048 pwcnt1 00000049 pwcnt2 0000004a pwcnt3 0000004b pwctl 00000054 pwdty0 00000050 pwdty1 00000051 pwdty2 00000052 pwdty3 00000053 pwen 00000042 pwper0 0000004c pwper1 0000004d pwper2 0000004e pwper3 0000004f pwpol 00000041 pwpres 00000043 pwscal0 00000044 pwscal1 00000046 pwscnt0 00000045 pwscnt1 00000047 pwtst 00000055 rdriv 0000000d reactback 00000001 reacthard 00000002 reactleft 00000001 reactrand 00000000 reactright 00000002 reactsoft 00000003 res4_ivect 0000ffd4 reset_ivect 0000fff0 reset_pvect 00000848 rightmotor ?00000000 rightspdtime ?00000000 rightspstr ?00000000 rightsts 000000e4 rightsts1 *000000f7 rightsts2 *000000fb rightsts3 *000000fb rightsts4 *00000100 rightstsx *00000104 rspdflag *00000002 rti_ivect 0000fff0 rti_pvect 00000833 rtictl *00000014 rtiflg *00000015 sc0bd 000000c0 sc0bdh 000000c0 sc0bdl 000000c1 sc0cr1 000000c2 sc0cr2 000000c3 sc0drh 000000c6 sc0drl 000000c7 sc0sr1 000000c4 sc0sr2 000000c5 sci0_ivect 0000ffd6 sci0_pvect 0000080c seg7port *00004000 siren 00000133 sirenfreq ?00000000 sirenfreq1 *000007d0 sirenfreq2 *000004b0 sirenoff 000000ba sirenon 000000b1 sirenrate1 *fffffff6 sirenrate2 *0000000a sirentimer ?00000000 sirenx *00000140 slow 000000e0 sp0br 000000d2 sp0cr1 000000d0 sp0cr2 000000d1 sp0dr 000000d5 sp0sr 000000d3 spdcaught ?00000000 spdlimit *0000001f spdtimeflg ?00000000 spi_tc_ivect 0000ffd8 spi_tc_pvect 0000080f swi_ivect 0000fff0 swi_pvect 0000083c t0_ivect 0000ffee t0_pvect 00000830 t1_ivect 0000ffec t1_pvect 0000082d t2_ivect 0000ffea t2_pvect 0000082a t3_ivect 0000ffe8 t3_pvect 00000827 t4_ivect 0000ffe6 t4_pvect 00000824 t5_ivect 0000ffe4 t5_pvect 00000821 t6_ivect 0000ffe2 t6_pvect 0000081e t7_ivect 0000ffe0 t7_pvect 0000081b tc0 *00000090 tc0h 00000090 tc0l 00000091 tc1 *00000092 tc1h 00000092 tc1l 00000093 tc2 *00000094 tc2h 00000094 tc2l 00000095 tc3 *00000096 tc3h 00000096 tc3l 00000097 tc4 *00000098 tc4h 00000098 tc4l 00000099 tc5 *0000009a tc5h 0000009a tc5l 0000009b tc6 *0000009c tc6h 0000009c tc6l 0000009d tc7 *0000009e tc7h 0000009e tc7l 0000009f tcnt 00000084 tcnth 00000084 tcntl 00000085 tctl1 *00000088 tctl2 *00000089 tctl3 *0000008a tctl4 *0000008b tflg1 *0000008e tflg2 *0000008f timeext 00000105 timeext1 *00000118 timeext2 *0000011d timeextx *00000128 timtst 000000ad tios *00000080 tmr_over_ivect 0000ffde tmr_over_pvect 00000818 tmsk1 *0000008c tmsk2 *0000008d trap_ivect 0000fff0 trap_pvect 0000083f tscr *00000086 updmotors 00000129 updmotorsx *00000132 uppertimer ?00000000 userprog_pvect 0000084b waitspeed 000000a5 waitspeed1 *000000a5 xirq_ivect 0000fff0 xirq_pvect 00000839