wait.lst - generated by MGTEK Assembler ASM12 V1.16 Build 101 for WIN32 (x86) - Wed Apr 17 13:20:52 2002 1: * Filename : WAIT.ASM 2: * Programmer : Michael Hattermann 3: * Date : March 29, 2002 4: * Version : 1.0 5: * Description : This file contains the wait and bumper 6: * functions. They must be together because 7: * the bumpers are checked while waiting. The 8: * following functions are available: 9: * 10: * WAIT - waits for specified # ms 11: * BUMPED - Determines if a bump has occured 12: * 13: =00000001 #define __DEBUGBUMP_ 1 14: =00000001 #define __PRINTBUMP_ 1 15: 16: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 14: =00000001 #define __HC12_ASM_ 1 15: 16: =00000000 IO_BASE EQU 0 17: 18: =00000000 PORTA EQU (IO_BASE + $00) 19: =00000001 PORTB EQU (IO_BASE + $01) 20: =00000002 DDRA EQU (IO_BASE + $02) 21: =00000003 DDRB EQU (IO_BASE + $03) 22: =00000008 PORTE EQU (IO_BASE + $08) 23: =00000009 DDRE EQU (IO_BASE + $09) 24: =0000000A PEAR EQU (IO_BASE + $0A) 25: =0000000B MODE EQU (IO_BASE + $0B) 26: =0000000C PUCR EQU (IO_BASE + $0C) 27: =0000000D RDRIV EQU (IO_BASE + $0D) 28: =00000010 INITRM EQU (IO_BASE + $10) 29: =00000011 INITRG EQU (IO_BASE + $11) 30: =00000012 INITEE EQU (IO_BASE + $12) 31: =00000013 MISC EQU (IO_BASE + $13) 32: =00000014 RTICTL EQU (IO_BASE + $14) 33: =00000015 RTIFLG EQU (IO_BASE + $15) 34: =00000016 COPCTL EQU (IO_BASE + $16) 35: =00000017 COPRST EQU (IO_BASE + $17) 36: =0000001E INTCR EQU (IO_BASE + $1E) 37: =0000001F HPRIO EQU (IO_BASE + $1F) 38: =00000020 BRKCT0 EQU (IO_BASE + $20) 39: =00000021 BRKCT1 EQU (IO_BASE + $21) 40: =00000022 BRKAH EQU (IO_BASE + $22) 41: =00000023 BRKAL EQU (IO_BASE + $23) 42: =00000024 BRKDH EQU (IO_BASE + $24) 43: =00000025 BRKDL EQU (IO_BASE + $25) 44: =00000040 PWCLK EQU (IO_BASE + $40) 45: =00000041 PWPOL EQU (IO_BASE + $41) 46: =00000042 PWEN EQU (IO_BASE + $42) 47: =00000043 PWPRES EQU (IO_BASE + $43) 48: =00000044 PWSCAL0 EQU (IO_BASE + $44) 49: =00000045 PWSCNT0 EQU (IO_BASE + $45) 50: =00000046 PWSCAL1 EQU (IO_BASE + $46) 51: =00000047 PWSCNT1 EQU (IO_BASE + $47) 52: =00000048 PWCNT0 EQU (IO_BASE + $48) 53: =00000049 PWCNT1 EQU (IO_BASE + $49) 54: =0000004A PWCNT2 EQU (IO_BASE + $4A) 55: =0000004B PWCNT3 EQU (IO_BASE + $4B) 56: =0000004C PWPER0 EQU (IO_BASE + $4C) 57: =0000004D PWPER1 EQU (IO_BASE + $4D) 58: =0000004E PWPER2 EQU (IO_BASE + $4E) 59: =0000004F PWPER3 EQU (IO_BASE + $4F) 60: =00000050 PWDTY0 EQU (IO_BASE + $50) 61: =00000051 PWDTY1 EQU (IO_BASE + $51) 62: =00000052 PWDTY2 EQU (IO_BASE + $52) 63: =00000053 PWDTY3 EQU (IO_BASE + $53) 64: =00000054 PWCTL EQU (IO_BASE + $54) 65: =00000055 PWTST EQU (IO_BASE + $55) 66: =00000056 PORTP EQU (IO_BASE + $56) 67: =00000057 DDRP EQU (IO_BASE + $57) 68: =00000060 ATDCTL0 EQU (IO_BASE + $60) 69: =00000061 ATDCTL1 EQU (IO_BASE + $61) 70: =00000062 ATDCTL2 EQU (IO_BASE + $62) 71: =00000063 ATDCTL3 EQU (IO_BASE + $63) 72: =00000064 ATDCTL4 EQU (IO_BASE + $64) 73: =00000065 ATDCTL5 EQU (IO_BASE + $65) 74: =00000066 ATDSTAT EQU (IO_BASE + $66) 75: =00000066 ATDSTATH EQU (IO_BASE + $66) 76: =00000067 ATDSTATL EQU (IO_BASE + $67) 77: =00000068 ATDTST EQU (IO_BASE + $68) 78: =00000068 ATDTSTH EQU (IO_BASE + $68) 79: =00000069 ATDTSTL EQU (IO_BASE + $69) 80: =0000006F PORTAD EQU (IO_BASE + $6F) 81: =00000070 ADR0 EQU (IO_BASE + $70) 82: =00000070 ADR0H EQU (IO_BASE + $70) 83: =00000071 ADR0L EQU (IO_BASE + $71) 84: =00000072 ADR1 EQU (IO_BASE + $72) 85: =00000072 ADR1H EQU (IO_BASE + $72) 86: =00000073 ADR1L EQU (IO_BASE + $73) 87: =00000074 ADR2 EQU (IO_BASE + $74) 88: =00000074 ADR2H EQU (IO_BASE + $74) 89: =00000075 ADR2L EQU (IO_BASE + $75) 90: =00000076 ADR3 EQU (IO_BASE + $76) 91: =00000076 ADR3H EQU (IO_BASE + $76) 92: =00000077 ADR3L EQU (IO_BASE + $77) 93: =00000078 ADR4 EQU (IO_BASE + $78) 94: =00000078 ADR4H EQU (IO_BASE + $78) 95: =00000079 ADR4L EQU (IO_BASE + $79) 96: =0000007A ADR5 EQU (IO_BASE + $7A) 97: =0000007A ADR5H EQU (IO_BASE + $7A) 98: =0000007B ADR5L EQU (IO_BASE + $7B) 99: =0000007C ADR6 EQU (IO_BASE + $7C) 100: =0000007C ADR6H EQU (IO_BASE + $7C) 101: =0000007D ADR6L EQU (IO_BASE + $7D) 102: =0000007E ADR7 EQU (IO_BASE + $7E) 103: =0000007E ADR7H EQU (IO_BASE + $7E) 104: =0000007F ADR7L EQU (IO_BASE + $7F) 105: =00000080 TIOS EQU (IO_BASE + $80) 106: =00000081 CFORC EQU (IO_BASE + $81) 107: =00000082 OC7M EQU (IO_BASE + $82) 108: =00000083 OC7D EQU (IO_BASE + $83) 109: =00000084 TCNT EQU (IO_BASE + $84) 110: =00000084 TCNTH EQU (IO_BASE + $84) 111: =00000085 TCNTL EQU (IO_BASE + $85) 112: =00000086 TSCR EQU (IO_BASE + $86) 113: =00000088 TCTL1 EQU (IO_BASE + $88) 114: =00000089 TCTL2 EQU (IO_BASE + $89) 115: =0000008A TCTL3 EQU (IO_BASE + $8A) 116: =0000008B TCTL4 EQU (IO_BASE + $8B) 117: =0000008C TMSK1 EQU (IO_BASE + $8C) 118: =0000008D TMSK2 EQU (IO_BASE + $8D) 119: =0000008E TFLG1 EQU (IO_BASE + $8E) 120: =0000008F TFLG2 EQU (IO_BASE + $8F) 121: =00000090 TC0 EQU (IO_BASE + $90) 122: =00000090 TC0H EQU (IO_BASE + $90) 123: =00000091 TC0L EQU (IO_BASE + $91) 124: =00000092 TC1 EQU (IO_BASE + $92) 125: =00000092 TC1H EQU (IO_BASE + $92) 126: =00000093 TC1L EQU (IO_BASE + $93) 127: =00000094 TC2 EQU (IO_BASE + $94) 128: =00000094 TC2H EQU (IO_BASE + $94) 129: =00000095 TC2L EQU (IO_BASE + $95) 130: =00000096 TC3 EQU (IO_BASE + $96) 131: =00000096 TC3H EQU (IO_BASE + $96) 132: =00000097 TC3L EQU (IO_BASE + $97) 133: =00000098 TC4 EQU (IO_BASE + $98) 134: =00000098 TC4H EQU (IO_BASE + $98) 135: =00000099 TC4L EQU (IO_BASE + $99) 136: =0000009A TC5 EQU (IO_BASE + $9A) 137: =0000009A TC5H EQU (IO_BASE + $9A) 138: =0000009B TC5L EQU (IO_BASE + $9B) 139: =0000009C TC6 EQU (IO_BASE + $9C) 140: =0000009C TC6H EQU (IO_BASE + $9C) 141: =0000009D TC6L EQU (IO_BASE + $9D) 142: =0000009E TC7 EQU (IO_BASE + $9E) 143: =0000009E TC7H EQU (IO_BASE + $9E) 144: =0000009F TC7L EQU (IO_BASE + $9F) 145: =000000A0 PACTL EQU (IO_BASE + $A0) 146: =000000A1 PAFLG EQU (IO_BASE + $A1) 147: =000000A2 PACN3 EQU (IO_BASE + $A2) 148: =000000A3 PACN2 EQU (IO_BASE + $A3) 149: =000000A4 PACN1 EQU (IO_BASE + $A4) 150: =000000A5 PACN0 EQU (IO_BASE + $A5) 151: =000000A6 MCCTL EQU (IO_BASE + $A6) 152: =000000A7 MCFLG EQU (IO_BASE + $A7) 153: =000000A8 ICPACR EQU (IO_BASE + $A8) 154: =000000A9 DLYCT EQU (IO_BASE + $A9) 155: =000000AA ICOVW EQU (IO_BASE + $AA) 156: =000000AB ICSYS EQU (IO_BASE + $AB) 157: =000000AD TIMTST EQU (IO_BASE + $AD) 158: =000000AE PORTT EQU (IO_BASE + $AE) 159: =000000AF DDRT EQU (IO_BASE + $AF) 160: =000000B0 PBCTL EQU (IO_BASE + $B0) 161: =000000B1 PBFLG EQU (IO_BASE + $B1) 162: =000000B2 PA3H EQU (IO_BASE + $B2) 163: =000000B3 PA2H EQU (IO_BASE + $B3) 164: =000000B4 PA1H EQU (IO_BASE + $B4) 165: =000000B5 PA0H EQU (IO_BASE + $B5) 166: =000000B6 MCCNT EQU (IO_BASE + $B6) 167: =000000B6 MCCNTH EQU (IO_BASE + $B6) 168: =000000B7 MCCNTL EQU (IO_BASE + $B7) 169: =000000C0 SC0BD EQU (IO_BASE + $C0) 170: =000000C0 SC0BDH EQU (IO_BASE + $C0) 171: =000000C1 SC0BDL EQU (IO_BASE + $C1) 172: =000000C2 SC0CR1 EQU (IO_BASE + $C2) 173: =000000C3 SC0CR2 EQU (IO_BASE + $C3) 174: =000000C4 SC0SR1 EQU (IO_BASE + $C4) 175: =000000C5 SC0SR2 EQU (IO_BASE + $C5) 176: =000000C6 SC0DRH EQU (IO_BASE + $C6) 177: =000000C7 SC0DRL EQU (IO_BASE + $C7) 178: =000000D0 SP0CR1 EQU (IO_BASE + $D0) 179: =000000D1 SP0CR2 EQU (IO_BASE + $D1) 180: =000000D2 SP0BR EQU (IO_BASE + $D2) 181: =000000D3 SP0SR EQU (IO_BASE + $D3) 182: =000000D5 SP0DR EQU (IO_BASE + $D5) 183: =000000D6 PORTS EQU (IO_BASE + $D6) 184: =000000D7 DDRS EQU (IO_BASE + $D7) 185: =000000DB PURDS EQU (IO_BASE + $DB) 186: =000000E0 SLOW EQU (IO_BASE + $E0) 187: =000000F0 EEMCR EQU (IO_BASE + $F0) 188: =000000F1 EEPROT EQU (IO_BASE + $F1) 189: =000000F2 EETST EQU (IO_BASE + $F2) 190: =000000F3 EEPROG EQU (IO_BASE + $F3) 191: =000000F4 FEELCK EQU (IO_BASE + $F4) 192: =000000F5 FEEMCR EQU (IO_BASE + $F5) 193: =000000F6 FEETST EQU (IO_BASE + $F6) 194: =000000F7 FEECTL EQU (IO_BASE + $F7) 195: =000000F8 BCR1 EQU (IO_BASE + $F8) 196: =000000F9 BSVR EQU (IO_BASE + $F9) 197: =000000FA BCR2 EQU (IO_BASE + $FA) 198: =000000FB BDR EQU (IO_BASE + $FB) 199: =000000FC BARD EQU (IO_BASE + $FC) 200: =000000FD DLCSCR EQU (IO_BASE + $FD) 201: =000000FE PORTDLC EQU (IO_BASE + $FE) 202: =000000FF DDRDLC EQU (IO_BASE + $FF) 203: * 204: ************************************************************ 205: * Interrupt vector addresses 206: ************************************************************ 207: * 208: =0000FFCC MOD_UNDER_IVECT EQU $FFCC 209: =0000FFCA PACB_OVER_IVECT EQU $FFCA 210: =0000FFD0 BDLC_IVECT EQU $FFD0 211: =0000FFD2 ATD_IVECT EQU $FFD2 212: =0000FFD4 RES4_IVECT EQU $FFD4 213: =0000FFD6 SCI0_IVECT EQU $FFD6 214: =0000FFD8 SPI_TC_IVECT EQU $FFD8 215: =0000FFDA PAC_IN_EDGE_IVECT EQU $FFDA 216: =0000FFDC PAC_OVER_IVECT EQU $FFDC 217: =0000FFDE TMR_OVER_IVECT EQU $FFDE 218: =0000FFE0 T7_IVECT EQU $FFE0 219: =0000FFE2 T6_IVECT EQU $FFE2 220: =0000FFE4 T5_IVECT EQU $FFE4 221: =0000FFE6 T4_IVECT EQU $FFE6 222: =0000FFE8 T3_IVECT EQU $FFE8 223: =0000FFEA T2_IVECT EQU $FFEA 224: =0000FFEC T1_IVECT EQU $FFEC 225: =0000FFEE T0_IVECT EQU $FFEE 226: =0000FFF0 RTI_IVECT EQU $FFF0 227: =0000FFF0 IRQ_IVECT EQU $FFF0 228: =0000FFF0 XIRQ_IVECT EQU $FFF0 229: =0000FFF0 SWI_IVECT EQU $FFF0 230: =0000FFF0 TRAP_IVECT EQU $FFF0 231: =0000FFF0 COP_FAIL_IVECT EQU $FFF0 232: =0000FFF0 COP_CLK_FAIL_IVECT EQU $FFF0 233: =0000FFF0 RESET_IVECT EQU $FFF0 234: * 235: ************************************************************ 236: * Pseudointerrupt vector addresses 237: ************************************************************ 238: * 239: =00000800 MOD_UNDER_PVECT EQU $0800 240: =00000803 PACB_OVER_PVECT EQU $0803 241: =00000806 BDLC_PVECT EQU $0806 242: =00000809 ATD_PVECT EQU $0809 243: =0000080C SCI0_PVECT EQU $080C 244: =0000080F SPI_TC_PVECT EQU $080F 245: =00000812 PAC_IN_EDGE_PVECT EQU $0812 246: =00000815 PAC_OVER_PVECT EQU $0815 247: =00000818 TMR_OVER_PVECT EQU $0818 248: =0000081B T7_PVECT EQU $081B 249: =0000081E T6_PVECT EQU $081E 250: =00000821 T5_PVECT EQU $0821 251: =00000824 T4_PVECT EQU $0824 252: =00000827 T3_PVECT EQU $0827 253: =0000082A T2_PVECT EQU $082A 254: =0000082D T1_PVECT EQU $082D 255: =00000830 T0_PVECT EQU $0830 256: =00000833 RTI_PVECT EQU $0833 257: =00000836 IRQ_PVECT EQU $0836 258: =00000839 XIRQ_PVECT EQU $0839 259: =0000083C SWI_PVECT EQU $083C 260: =0000083F TRAP_PVECT EQU $083F 261: =00000842 COP_FAIL_PVECT EQU $0842 262: =00000845 COP_CLK_FAIL_PVECT EQU $0845 263: =00000848 RESET_PVECT EQU $0848 264: =0000084B USERPROG_PVECT EQU $084B 265: * 266: ************************************************************ 267: * Bit Equates 268: ************************************************************ 269: * 270: =00000001 BIT0 EQU %00000001 ; bit 0 271: =000000FE INV0 EQU %11111110 ; inverse of bit 0 272: =00000002 BIT1 EQU %00000010 ; bit 1 273: =000000FD INV1 EQU %11111101 ; inverse of bit 1 274: =00000004 BIT2 EQU %00000100 ; bit 2 275: =000000FB INV2 EQU %11111011 ; inverse of bit 2 276: =00000008 BIT3 EQU %00001000 ; bit 3 277: =000000F7 INV3 EQU %11110111 ; inverse of bit 3 278: =00000010 BIT4 EQU %00010000 ; bit 4 279: =000000EF INV4 EQU %11101111 ; inverse of bit 4 280: =00000020 BIT5 EQU %00100000 ; bit 5 281: =000000DF INV5 EQU %11011111 ; inverse of bit 5 282: =00000040 BIT6 EQU %01000000 ; bit 6 283: =000000BF INV6 EQU %10111111 ; inverse of bit 6 284: =00000080 BIT7 EQU %10000000 ; bit 7 285: =0000007F INV7 EQU %01111111 ; inverse of bit 7 286: * 287: ************************************************************ 288: * Port Equates 289: ************************************************************ 290: * 291: =00004000 SEG7PORT EQU $4000 ; 7-segment display output port 292: *OUT1PORT EQU $5000 ; Output port 1 293: =00006000 LED1PORT EQU $6000 ; LED Output port 1 294: *LED2PORT EQU $7000 ; LED Output port 2 295: * IN1PORT EQU $4000 ; Input port 1 296: * IN2PORT EQU $5000 ; Input port 2 297: * 298: ************************************************************ 299: * STEVE Common System Equates 300: ************************************************************ 301: * 302: 303: * Object avoidance/following reaction equates 304: ********************************************* 305: =00000001 REACTBACK EQU $01 ; Reaction values 306: =00000002 REACTHARD EQU $02 ; 307: =00000003 REACTSOFT EQU $03 ; 308: =00000000 NOACTION EQU $00 ; 309: 310: =00000000 REACTRAND EQU $00 ; 311: =00000001 REACTLEFT EQU $01 ; 312: =00000002 REACTRIGHT EQU $02 ; 313: 314: #endif 17: * 18: ************************************************************ 19: * Bump/Wait Equates 20: ************************************************************ 21: * 22: =00000009 NOBUMPMAX EQU $09 ; max value for no bumper pressed 23: =00000047 FRONTREAR EQU $47 ; division between front and back 24: 25: * 26: ************************************************************ 27: * Bump/Wait Debug Code 28: ************************************************************ 29: * 30: #ifdef __DEBUGBUMP_ 31: =0000084B ORG USERPROG_PVECT 32: 084B 06 B000 [03] JMP TEST 33: 34: =00000900 ORG $0900 35: 0900 00 BUMPVALUE DC.B $00 ; bumper value 36: 37: =0000B000 ORG $B000 38: 39: B000 86 00 [01] TEST LDAA #$00 ; turn off COP watchdog timer 40: B002 5A 16 [02] STAA COPCTL 41: 42: B004 CF 0BFF [02] LDS #$0bff ; init the stack pointer 43: 44: B007 CE 03E8 [02] LDX #1000 ; 45: B00A 16 B11F [04] JSR WAIT ; 46: 47: B00D 16 B0DF [04] JSR INITATD ; init A/D system 48: B010 16 B0D1 [04] JSR INITSCI ; init SCI system 49: B013 180B 80 0086 [04] MOVB #$80,TSCR ; enable the timer 50: 51: B018 CE 01F4 [02] TEST1 LDX #500 ; wait 1/2 sec 52: B01B 16 B11F [04] JSR WAIT ; 53: B01E B6 0900 [03] LDAA BUMPVALUE ; get bumper value 54: B021 04 50 F4 [03] TBEQ A,TEST1 ; if bumper not pressed, keep checking 55: 56: B024 20 F2 [03] BRA TEST1 ; 57: 58: B026 CE 0001 [02] TEST2 LDX #1 ; wait 1ms to time wait routine 59: B029 DD 84 [03] LDY TCNT ; get start value of timer 60: B02B 16 B11F [04] JSR WAIT ; wait 61: B02E DE 84 [03] LDX TCNT ; get end value of timer 62: B030 16 B0C4 [04] JSR OUTADDR ; print start value 63: B033 86 20 [01] LDAA #$20 ; print blank space 64: B035 16 B07F [04] JSR OUTCHAR ; 65: B038 B7 65 [01] TFR Y,X ; get end value 66: B03A 16 B0C4 [04] JSR OUTADDR ; print end value 67: B03D CE B045 [02] LDX #NEWLINE ; print end of line 68: B040 16 B085 [04] JSR OUTSTR ; 69: 70: B043 20 D3 [03] BRA TEST1 ; 71: 72: B045 0D 0A 04 NEWLINE DC.B CR,LF,EOS 73: 74: #include "sci.asm" 1: * Filename : SCI.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 4, 2002 4: * Version : 1.0 5: * Description : This file contains SCI communication 6: * functions for input and output of 7: * data. The following functions are 8: * available: 9: * 10: * WAIT_TC - wait for transmit complete 11: * SET_BAUD - change the baud rate 12: * TX_ON - turn transmitter on 13: * TX_OFF - turn transmitter off 14: * RX_ON - turn receiver on 15: * RX_OFF - turn receiver off 16: * RX_INT_ON - turn receiver interrupts on 17: * RX_INT_OFF - turn receiver interrupts off 18: * OUTCHAR - prints character to screen 19: * OUTSTR - prints string to screen 20: * INCHARWAIT - waits for character input 21: * INCHAR - get character input if any 22: * OUTNUM - prints number to screen 23: * NIBTOCHAR - prints nibble to screen 24: * OUTADDR - prints 16-bit num to screen 25: * INITSCI - turns on SCI for 9600 baud 26: * 27: * 28: *#define __DEBUGSCI_ 1 29: 30: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 314: #endif 31: 32: * 33: ************************************************************ 34: * SCI Equates 35: ************************************************************ 36: * 37: ****Baud rate equates**** 38: =00000000 BAUD19200 EQU 0 39: =00000002 BAUD14400 EQU 2 40: =00000004 BAUD9600 EQU 4 41: =00000006 BAUD4800 EQU 6 42: =00000008 BAUD2400 EQU 8 43: =0000000A BAUD1200 EQU 10 44: =0000000C BAUD600 EQU 12 45: =0000000E BAUD300 EQU 14 46: 47: ****ASCII character equates**** 48: =00000004 EOS EQU $04 ; User-defined End Of String (EOS) character 49: =0000000D CR EQU $0D ; Carriage Return Character 50: =0000000A LF EQU $0A ; Line Feed Character 51: =0000001B ESC EQU $1B ; ESC character 52: 53: * 54: ************************************************************ 55: * SCI Test Program 56: ************************************************************ 57: * 58: #ifdef __DEBUGSCI_ 105: #endif 106: * 107: ************************************************************ 108: * Constant Definitions 109: ************************************************************ 110: * 111: B048 000D BAUDTBL DC.W 13 ; (0) BAUD rate = 19200 112: B04A 0011 DC.W 17 ; (1) BAUD rate = 14400 113: B04C 001A DC.W 26 ; (2) BAUD rate = 9600 114: B04E 0034 DC.W 52 ; (3) BAUD rate = 4800 115: B050 0068 DC.W 104 ; (4) BAUD rate = 2400 116: B052 00D0 DC.W 208 ; (5) BAUD rate = 1200 117: B054 01A1 DC.W 417 ; (6) BAUD rate = 600 118: B056 0341 DC.W 833 ; (7) BAUD rate = 300 119: * 120: ******************************************************************************* 121: * SUBROUTINE - WAIT_TC 122: * Description: Waits for the current transmit operation to complete (polls the 123: * TC flag in SCI status register 1) 124: * Input : None. 125: * Output : None. 126: * Destroys : None. 127: * Calls : None. 128: ******************************************************************************* 129: * 130: B058 WAIT_TC 131: B058 4F C4 40 FC [04] BRCLR SC0SR1,BIT6,WAIT_TC ; wait until done sending 132: B05C 3D [05] RTS ; Return to caller 133: * 134: * 135: ******************************************************************************* 136: * SUBROUTINE - SET_BAUD 137: * Description: Sets the baud rate to the rate specified in register A. Reg A 138: * can only take on these predefined values: 139: * BAUD19200 = BAUD rate 19200 140: * BAUD14400 = BAUD rate 14400 141: * BAUD9600 = BAUD rate 9600 142: * BAUD4800 = BAUD rate 4800 143: * BAUD2400 = BAUD rate 2400 144: * BAUD1200 = BAUD rate 1200 145: * BAUD600 = BAUD rate 600 146: * BAUD300 = BAUD rate 300 147: * 148: * Input : New baud rate in reg A 149: * Output : None. 150: * Destroys : SC0BDH, SC0BDL. 151: * Calls : None. 152: ******************************************************************************* 153: * 154: B05D SET_BAUD 155: B05D 34 [02] PSHX ; Preserve reg X 156: 157: B05E CE B048 [02] LDX #BAUDTBL ; Load address of baud table 158: B061 EE E4 [03] LDX A,X ; Load baud rate from table 159: B063 5E C0 [02] STX SC0BD ; Set baud rate in register 160: 161: B065 30 [03] PULX ; Restore reg X 162: B066 3D [05] RTS ; Return to caller 163: * 164: ******************************************************************************* 165: * SUBROUTINE - TX_ON, TX_OFF 166: * Description: Enables transmitter, disables transmitter 167: * Input : None. 168: * Output : None. 169: * Destroys : SC0CR2. 170: * Calls : None. 171: ******************************************************************************* 172: * 173: B067 TX_ON 174: B067 4C C3 08 [04] BSET SC0CR2,BIT3 ; turn on the transmitter 175: B06A 3D [05] RTS ; return to caller 176: B06B TX_OFF 177: B06B 4D C3 08 [04] BCLR SC0CR2,BIT3 ; turn off the transmitter 178: B06E 3D [05] RTS ; return to caller 179: * 180: ******************************************************************************* 181: * SUBROUTINE - RX_ON, RX_OFF,RX_INT_ON,RX_INT_OFF 182: * Description: Enables receiver, disables receiver, enables receive interrupts, 183: * disables receive interrupts 184: * Input : None. 185: * Output : None. 186: * Destroys : SC0CR2. 187: * Calls : None. 188: ******************************************************************************* 189: * 190: B06F RX_ON 191: B06F 4C C3 04 [04] BSET SC0CR2,BIT2 ; turn on the receiver 192: B072 3D [05] RTS ; return to caller 193: B073 RX_OFF 194: B073 4D C3 04 [04] BCLR SC0CR2,BIT2 ; turn off the receiver 195: B076 3D [05] RTS ; return to caller 196: B077 RX_INT_ON 197: B077 4C C3 20 [04] BSET SC0CR2,BIT5 ; enable receiver interrupts 198: B07A 3D [05] RTS ; return to caller 199: B07B RX_INT_OFF 200: B07B 4D C3 20 [04] BCLR SC0CR2,BIT5 ; disable receiver interrupts 201: B07E 3D [05] RTS ; return to caller 202: * 203: ************************************************************************ 204: * SUBROUTINE - OUTCHAR 205: * Description: Outputs the character in register A to the screen 206: * Input : Data to be transmitted in register A. 207: * Output : Transmits the data. 208: * Destroys : None. 209: * Calls : WAIT_TC 210: ************************************************************************ 211: * 212: B07F OUTCHAR 213: B07F 16 B058 [04] JSR WAIT_TC ; wait until transmitter is idle 214: B082 5A C7 [02] STAA SC0DRL ; output character 215: B084 3D [05] RTS ; Return from subtoutine 216: * 217: ************************************************************************ 218: * SUBROUTINE - OUTSTR 219: * Description: Outputs the string pointed to by X. String must be 220: * terminated by EOS character. 221: * Input : String to be output in reg X 222: * Output : Transmits the string. 223: * Destroys : None. 224: * Calls : OUTCHAR 225: ************************************************************************ 226: * 227: B085 OUTSTR 228: B085 36 [02] PSHA ; preserve reg A 229: B086 34 [02] PSHX ; preserve reg X 230: B087 OUTSTR1 231: B087 A6 30 [03] LDAA 1,X+ ; Get a character (put in reg A) 232: B089 81 04 [01] CMPA #EOS ; Check if it's EOS 233: B08B 27 05 [03] BEQ OUTSTR2 ; Branch to Done if it's EOS 234: B08D 16 B07F [04] JSR OUTCHAR ; Print the character 235: B090 20 F5 [03] BRA OUTSTR1 236: B092 OUTSTR2 237: B092 30 [03] PULX ; restore reg X 238: B093 32 [03] PULA ; restore reg A 239: B094 3D [05] RTS ; Return from subtoutine 240: * 241: ************************************************************************ 242: * SUBROUTINE - INCHARWAIT 243: * Description: Waits for a character to be pressed and reads it into 244: * reg A 245: * Input : None 246: * Output : Character pressed in reg. A 247: * Destroys : A. 248: * Calls : None 249: ************************************************************************ 250: * 251: B095 INCHARWAIT 252: B095 4F C4 20 FC [04] BRCLR SC0SR1,BIT5,INCHARWAIT ; wait until buffer full 253: B099 96 C7 [03] LDAA SC0DRL ; input character 254: B09B 3D [05] RTS ; Return from subroutine 255: * 256: ************************************************************************ 257: * SUBROUTINE - INCHAR 258: * Description: Checks to see if character recevied - if so returns the 259: * character, if not returns 0 260: * Input : None 261: * Output : Character pressed in reg A; 0 if none 262: * Destroys : A. 263: * Calls : None 264: ************************************************************************ 265: * 266: B09C INCHAR 267: B09C 4F C4 20 02 [04] BRCLR SC0SR1,BIT5,INCHAR1 ; if there is no data, get out 268: B0A0 96 C7 [03] LDAA SC0DRL ; yes, read data 269: B0A2 INCHAR1 270: B0A2 3D [05] RTS ; return to caller 271: * 272: ************************************************************************ 273: * SUBROUTINE - OUTNUM 274: * Description: Outputs the number in register A to the screen 275: * Input : Data to be transmitted in register A. 276: * Output : Transmits the data. 277: * Destroys : None. 278: * Calls : NIBTOCHAR 279: ************************************************************************ 280: * 281: B0A3 OUTNUM 282: B0A3 36 [02] PSHA ; preserve reg A 283: B0A4 36 [02] PSHA ; preserve reg A 284: B0A5 84 F0 [01] ANDA #%11110000 ; get upper nibble 285: B0A7 44 [01] LSRA ; shift it right to get the nibble 286: B0A8 44 [01] LSRA 287: B0A9 44 [01] LSRA 288: B0AA 44 [01] LSRA 289: B0AB 16 B0B6 [04] JSR NIBTOCHAR ; change A and print it 290: B0AE 32 [03] PULA ; restore reg A 291: B0AF 84 0F [01] ANDA #%00001111 ; get lower nibble 292: B0B1 16 B0B6 [04] JSR NIBTOCHAR ; change A and print it 293: B0B4 32 [03] PULA ; restore reg A 294: B0B5 3D [05] RTS ; return to caller 295: * 296: ************************************************************************ 297: * SUBROUTINE - NIBTOCHAR 298: * Description: Converts lower nibble of A to ASCII and prints it 299: * Input : Data to convert in A. 300: * Output : Transmits the data. 301: * Destroys : None. 302: * Calls : OUTCHAR 303: ************************************************************************ 304: * 305: B0B6 NIBTOCHAR 306: B0B6 81 09 [01] CMPA #9 ; is it greater than 9? 307: B0B8 2E 04 [03] BGT NIBTOCHAR1 ; if so, print a character 308: B0BA 8B 30 [01] ADDA #48 ; if not, print a number starting at 48 ASCII 309: B0BC 20 02 [03] BRA NIBTOCHAR2 ; 310: B0BE NIBTOCHAR1 311: B0BE 8B 37 [01] ADDA #55 ; if so, print a letter starting at 55 = 65-10 312: B0C0 NIBTOCHAR2 313: B0C0 16 B07F [04] JSR OUTCHAR ; print it 314: B0C3 3D [05] RTS 315: * 316: ************************************************************************ 317: * SUBROUTINE - OUTADDR 318: * Description: Outputs the number in reg X to the screen 319: * Input : Data to print in X. 320: * Output : Transmits the data. 321: * Destroys : None. 322: * Calls : OUTNUM 323: ************************************************************************ 324: * 325: B0C4 OUTADDR 326: B0C4 3B [02] PSHD ; save reg D 327: B0C5 B7 54 [01] TFR X,D ; load X into D 328: B0C7 16 B0A3 [04] JSR OUTNUM ; prints whats in A -- MSB 329: B0CA 180F [02] TBA ; B -> A 330: B0CC 16 B0A3 [04] JSR OUTNUM ; prints whats in B -- LSB 331: B0CF 3A [03] PULD ; restore D 332: B0D0 3D [05] RTS ; return to caller 333: * 334: ************************************************************************ 335: * SUBROUTINE - INITSCI 336: * Description: This subroutine initializes the BAUD rate to 9600 and 337: * sets up the SCI port for 1 start bit, 8 data bits and 338: * 1 stop bit. It also enables the transmitter and receiver 339: * Input : None. 340: * Output : Initializes SCI. 341: * Destroys : None. 342: * Calls : SET_BAUD,TX_ON,RX_ON 343: ************************************************************************ 344: * 345: B0D1 36 [02] INITSCI PSHA ; save reg A 346: B0D2 86 04 [01] LDAA #BAUD9600 ; set the baud rate to 9600 347: B0D4 16 B05D [04] JSR SET_BAUD ; 348: B0D7 16 B067 [04] JSR TX_ON ; turn on the transmitter 349: B0DA 16 B06F [04] JSR RX_ON ; turn on the receiver 350: B0DD 32 [03] PULA ; restore reg A 351: B0DE 3D [05] RTS ; Return from subtoutine 352: * 353: ************************************************************************ 75: #include "atd.asm" 1: * Filename : ATD.ASM 2: * Programmer : Michael Hattermann 3: * Date : February 22, 2002 4: * Version : 1.0 5: * Description : This file contains the Analog to 6: * Digital (A/D) conversion functions 7: * for the input of analog signals. The 8: * following functions are available: 9: * 10: * INITATD - Initializes the ATD system 11: * KILLATD - Shuts down the ATD system 12: * ANALOG - Returns ATD value for port specified 13: * 14: *#define __DEBUGATD_ 1 15: 16: 17: #include "hc12.asm" 1: * Filename : HC12.H 2: * Programmer : Michael Hattermann 3: * Date : February 21, 2002 4: * Version : 1.0 5: * Description : This file contains equates for the HC12 6: * processor 7: * 8: * 9: ************************************************************ 10: * Register Equates 11: ************************************************************ 12: * 13: #ifndef __HC12_ASM_ 314: #endif 18: * 19: ************************************************************ 20: * A/D Equates 21: ************************************************************ 22: * 23: =00000000 CHANNEL0 EQU $00 24: =00000001 CHANNEL1 EQU $01 25: =00000002 CHANNEL2 EQU $02 26: =00000003 CHANNEL3 EQU $03 27: =00000004 CHANNEL4 EQU $04 28: =00000005 CHANNEL5 EQU $05 29: =00000006 CHANNEL6 EQU $06 30: =00000007 CHANNEL7 EQU $07 31: * 32: ************************************************************ 33: * A/D Channel Assignments 34: ************************************************************ 35: * 36: =00000000 LEFTIR EQU CHANNEL0 37: =00000001 RIGHTIR EQU CHANNEL1 38: =00000002 CENTERIR EQU CHANNEL2 39: =00000004 CENTERFOLLOW EQU CHANNEL4 40: =00000005 LEFTFOLLOW EQU CHANNEL5 41: =00000006 RIGHTFOLLOW EQU CHANNEL6 42: =00000007 BUMPER EQU CHANNEL7 43: * 44: ************************************************************ 45: * A/D Debug Code 46: ************************************************************ 47: * 48: #ifdef __DEBUGATD_ 95: #endif 96: * 97: ******************************************************************************* 98: * SUBROUTINE - INITATD 99: * Description: Initializes the analog to digital converter 100: * Input : None. 101: * Output : None. 102: * Destroys : None. 103: * Calls : None. 104: ******************************************************************************* 105: * 106: B0DF 36 [02] INITATD PSHA ; save reg A 107: B0E0 180B 80 0062 [04] MOVB #$80,ATDCTL2 ; turn on ATD system 108: B0E5 180B 00 0063 [04] MOVB #$00,ATDCTL3 ; enable conversions in bgnd mode 109: B0EA 180B 01 0064 [04] MOVB #$01,ATDCTL4 ; setup conversion rate = 2MHz 110: 111: B0EF 86 C3 [01] LDAA #195 ; load loop counter 112: B0F1 A7 [01] INITATD1 NOP ; wait for ATD to power up 113: B0F2 04 30 FC [03] DBNE A,INITATD1 ; if we still need to wait, wait 114: 115: B0F5 32 [03] PULA ; restore reg A 116: B0F6 3D [05] RTS ; return to caller 117: * 118: ******************************************************************************* 119: * SUBROUTINE - KILLATD 120: * Description: Shuts down the analog to digital converter 121: * Input : None. 122: * Output : None. 123: * Destroys : None. 124: * Calls : None. 125: ******************************************************************************* 126: * 127: B0F7 180B 00 0060 [04] KILLATD MOVB #$00,ATDCTL0 ; stop current conversion (if there is one) 128: B0FC 180B 00 0062 [04] MOVB #$00,ATDCTL2 ; turn off ATD system 129: B101 3D [05] RTS ; return to caller 130: * 131: ******************************************************************************* 132: * SUBROUTINE - ANALOG 133: * Description: Converts the analog channel specified by reg A and returns the 134: * converted value in reg A. Valid values for channel are (the 135: * equates an be found above): 136: * 137: * CHANNEL0 - A/D Channel #0 138: * CHANNEL1 - A/D Channel #1 139: * CHANNEL2 - A/D Channel #2 140: * CHANNEL3 - A/D Channel #3 141: * CHANNEL4 - A/D Channel #4 142: * CHANNEL5 - A/D Channel #5 143: * CHANNEL6 - A/D Channel #6 144: * CHANNEL7 - A/D Channel #7 145: * 146: * Input : Channel to convert in reg A. 147: * Output : Digital value of channel in reg A. 148: * Destroys : None. 149: * Calls : None. 150: ******************************************************************************* 151: * 152: B102 5A 65 [02] ANALOG STAA ATDCTL5 ; start conversion on channel specified 153: B104 4F 66 80 FC [04] ANALOG1 BRCLR ATDSTATH,BIT7,ANALOG1 ; wait for conversion to complete 154: B108 96 74 [03] LDAA ADR2H ; load conversion result 155: B10A 3D [05] RTS ; return to caller 156: * 157: ************************************************************************ 76: 77: #endif 78: 79: #ifdef __PRINTBUMP_ 80: B10B 42 55 4D 50 45 52 BUMPSTR DC.B 'BUMPER VALUE = ' B111 20 56 41 4C 55 45 B117 20 3D 20 81: B11A 04 DC.B EOS 82: #endif 83: 84: * 85: ******************************************************************************* 86: * SUBROUTINE - WAIT 87: * Description: Waits for the designated amount of time (in ms). If a bumper is 88: * pressed while waiting, it will quit waiting and returns to the 89: * function that called it. Function returns 0 if waited full time, 90: * returns bumper value otherwise 91: * Input : # of ms to wait in reg X. 92: * Output : Bumper value in BUMPVALUE. 93: * Destroys : None. 94: * Calls : None. 95: ******************************************************************************* 96: * 97: *WAIT TBEQ X,WAITX ; if no time to wait, get out 98: * PSHX ; save reg X 99: * PSHD ; save reg D 100: * MOVB #$00,BUMPVALUE ; clear old bumper value 101: * 102: *WAIT1 LDAB #11 ; load loop counter 103: * 104: *WAIT2 LDAA #BUMPER ; check to see if we have 105: * JSR ANALOG ; been bumped 106: * CMPA #NOBUMPMAX ; were we bumped? 107: * BHI WAITBX ; yes, get out 108: * NOP ; do nothing 109: * NOP ; 110: * NOP ; 111: * NOP ; 112: * NOP ; 113: * NOP ; 114: * NOP ; 115: * NOP ; 116: * NOP ; 117: * DBNE B,WAIT2 ; repeat until counter=0 118: * 119: * DBNE X,WAIT1 ; if we need to wait more, go wait 120: * 121: *WAITX PULD ; restore reg D 122: * PULX ; restore reg X 123: * RTS ; return to caller 124: *WAITBX STAA BUMPVALUE ; save bumper value 125: * 126: *#ifdef __PRINTBUMP_ 127: * PSHX ; save reg X 128: * LDX #BUMPSTR ; print bump string 129: * JSR OUTSTR ; 130: * JSR OUTNUM ; print analog value 131: * LDX #NEWLINE ; print end of line 132: * JSR OUTSTR ; 133: * PULX ; restore reg X 134: *#endif 135: * 136: * BRA WAITX ; get out 137: * 138: ******************************************************************************* 139: * SUBROUTINE - BUMPED 140: * Description: Determines if a bump sensor has been pressed. If it has, the 141: * function will return the value read from the bumper A/D port. 142: * If no bumper is pressed, a $00 will be returned. 143: * Input : None. 144: * Output : Bumper value in reg A. 145: * Destroys : Reg A. 146: * Calls : None. 147: ******************************************************************************* 148: * 149: B11B B6 0900 [03] BUMPED LDAA BUMPVALUE ; get the last bump value 150: B11E 3D [05] RTS ; return to caller 151: * 152: ******************************************************************************* 153: * SUBROUTINE - WAIT 154: * Description: Waits for the designated amount of time (in ms). 155: * Input : # of ms to wait in reg X. 156: * Output : None. 157: * Destroys : None. 158: * Calls : None. 159: ******************************************************************************* 160: * 161: B11F 04 45 0B [03] WAIT TBEQ X,WAITX ; if no time to wait, get out 162: B122 34 [02] PSHX ; save reg X 163: B123 3B [02] PSHD ; save reg D 164: 165: B124 CC 052B [02] WAIT1 LDD #1323 ; load loop counter 166: 167: B127 WAIT2 168: B127 04 34 FD [03] DBNE D,WAIT2 ; repeat until counter=0 169: 170: B12A 04 35 F7 [03] DBNE X,WAIT1 ; if we need to wait more, go wait 171: 172: B12D 3A [03] WAITX PULD ; restore reg D 173: B12E 30 [03] PULX ; restore reg X 174: B12F 3D [05] RTS ; return to caller 175: * 176: ******************************************************************************* Symbols: __debugbump_ 00000001 __hc12_asm_ 00000001 __printbump_ 00000001 adr0 00000070 adr0h 00000070 adr0l 00000071 adr1 00000072 adr1h 00000072 adr1l 00000073 adr2 00000074 adr2h *00000074 adr2l 00000075 adr3 00000076 adr3h 00000076 adr3l 00000077 adr4 00000078 adr4h 00000078 adr4l 00000079 adr5 0000007a adr5h 0000007a adr5l 0000007b adr6 0000007c adr6h 0000007c adr6l 0000007d adr7 0000007e adr7h 0000007e adr7l 0000007f analog 0000b102 analog1 *0000b104 atd_ivect 0000ffd2 atd_pvect 00000809 atdctl0 *00000060 atdctl1 00000061 atdctl2 *00000062 atdctl3 *00000063 atdctl4 *00000064 atdctl5 *00000065 atdstat 00000066 atdstath *00000066 atdstatl 00000067 atdtst 00000068 atdtsth 00000068 atdtstl 00000069 bard 000000fc baud1200 0000000a baud14400 00000002 baud19200 00000000 baud2400 00000008 baud300 0000000e baud4800 00000006 baud600 0000000c baud9600 *00000004 baudtbl *0000b048 bcr1 000000f8 bcr2 000000fa bdlc_ivect 0000ffd0 bdlc_pvect 00000806 bdr 000000fb bit0 00000001 bit1 00000002 bit2 *00000004 bit3 *00000008 bit4 00000010 bit5 *00000020 bit6 *00000040 bit7 *00000080 brkah 00000022 brkal 00000023 brkct0 00000020 brkct1 00000021 brkdh 00000024 brkdl 00000025 bsvr 000000f9 bumped 0000b11b bumper 00000007 bumpstr 0000b10b bumpvalue *00000900 centerfollow 00000004 centerir 00000002 cforc 00000081 channel0 *00000000 channel1 *00000001 channel2 *00000002 channel3 00000003 channel4 *00000004 channel5 *00000005 channel6 *00000006 channel7 *00000007 cop_clk_fail_ivect 0000fff0 cop_clk_fail_pvect 00000845 cop_fail_ivect 0000fff0 cop_fail_pvect 00000842 copctl *00000016 coprst 00000017 cr *0000000d ddra 00000002 ddrb 00000003 ddrdlc 000000ff ddre 00000009 ddrp 00000057 ddrs 000000d7 ddrt 000000af dlcscr 000000fd dlyct 000000a9 eemcr 000000f0 eeprog 000000f3 eeprot 000000f1 eetst 000000f2 eos *00000004 esc 0000001b feectl 000000f7 feelck 000000f4 feemcr 000000f5 feetst 000000f6 frontrear 00000047 hprio 0000001f icovw 000000aa icpacr 000000a8 icsys 000000ab inchar 0000b09c inchar1 *0000b0a2 incharwait *0000b095 initatd *0000b0df initatd1 *0000b0f1 initee 00000012 initrg 00000011 initrm 00000010 initsci *0000b0d1 intcr 0000001e inv0 000000fe inv1 000000fd inv2 000000fb inv3 000000f7 inv4 000000ef inv5 000000df inv6 000000bf inv7 0000007f io_base *00000000 irq_ivect 0000fff0 irq_pvect 00000836 killatd 0000b0f7 led1port 00006000 leftfollow 00000005 leftir 00000000 lf *0000000a mccnt 000000b6 mccnth 000000b6 mccntl 000000b7 mcctl 000000a6 mcflg 000000a7 misc 00000013 mod_under_ivect 0000ffcc mod_under_pvect 00000800 mode 0000000b newline *0000b045 nibtochar *0000b0b6 nibtochar1 *0000b0be nibtochar2 *0000b0c0 noaction 00000000 nobumpmax 00000009 oc7d 00000083 oc7m 00000082 outaddr *0000b0c4 outchar *0000b07f outnum *0000b0a3 outstr *0000b085 outstr1 *0000b087 outstr2 *0000b092 pa0h 000000b5 pa1h 000000b4 pa2h 000000b3 pa3h 000000b2 pac_in_edge_ivect 0000ffda pac_in_edge_pvect 00000812 pac_over_ivect 0000ffdc pac_over_pvect 00000815 pacb_over_ivect 0000ffca pacb_over_pvect 00000803 pacn0 000000a5 pacn1 000000a4 pacn2 000000a3 pacn3 000000a2 pactl 000000a0 paflg 000000a1 pbctl 000000b0 pbflg 000000b1 pear 0000000a porta 00000000 portad 0000006f portb 00000001 portdlc 000000fe porte 00000008 portp 00000056 ports 000000d6 portt 000000ae pucr 0000000c purds 000000db pwclk 00000040 pwcnt0 00000048 pwcnt1 00000049 pwcnt2 0000004a pwcnt3 0000004b pwctl 00000054 pwdty0 00000050 pwdty1 00000051 pwdty2 00000052 pwdty3 00000053 pwen 00000042 pwper0 0000004c pwper1 0000004d pwper2 0000004e pwper3 0000004f pwpol 00000041 pwpres 00000043 pwscal0 00000044 pwscal1 00000046 pwscnt0 00000045 pwscnt1 00000047 pwtst 00000055 rdriv 0000000d reactback 00000001 reacthard 00000002 reactleft 00000001 reactrand 00000000 reactright 00000002 reactsoft 00000003 res4_ivect 0000ffd4 reset_ivect 0000fff0 reset_pvect 00000848 rightfollow 00000006 rightir 00000001 rti_ivect 0000fff0 rti_pvect 00000833 rtictl 00000014 rtiflg 00000015 rx_int_off 0000b07b rx_int_on 0000b077 rx_off 0000b073 rx_on *0000b06f sc0bd *000000c0 sc0bdh 000000c0 sc0bdl 000000c1 sc0cr1 000000c2 sc0cr2 *000000c3 sc0drh 000000c6 sc0drl *000000c7 sc0sr1 *000000c4 sc0sr2 000000c5 sci0_ivect 0000ffd6 sci0_pvect 0000080c seg7port 00004000 set_baud *0000b05d slow 000000e0 sp0br 000000d2 sp0cr1 000000d0 sp0cr2 000000d1 sp0dr 000000d5 sp0sr 000000d3 spi_tc_ivect 0000ffd8 spi_tc_pvect 0000080f swi_ivect 0000fff0 swi_pvect 0000083c t0_ivect 0000ffee t0_pvect 00000830 t1_ivect 0000ffec t1_pvect 0000082d t2_ivect 0000ffea t2_pvect 0000082a t3_ivect 0000ffe8 t3_pvect 00000827 t4_ivect 0000ffe6 t4_pvect 00000824 t5_ivect 0000ffe4 t5_pvect 00000821 t6_ivect 0000ffe2 t6_pvect 0000081e t7_ivect 0000ffe0 t7_pvect 0000081b tc0 00000090 tc0h 00000090 tc0l 00000091 tc1 00000092 tc1h 00000092 tc1l 00000093 tc2 00000094 tc2h 00000094 tc2l 00000095 tc3 00000096 tc3h 00000096 tc3l 00000097 tc4 00000098 tc4h 00000098 tc4l 00000099 tc5 0000009a tc5h 0000009a tc5l 0000009b tc6 0000009c tc6h 0000009c tc6l 0000009d tc7 0000009e tc7h 0000009e tc7l 0000009f tcnt *00000084 tcnth 00000084 tcntl 00000085 tctl1 00000088 tctl2 00000089 tctl3 0000008a tctl4 0000008b test *0000b000 test1 *0000b018 test2 0000b026 tflg1 0000008e tflg2 0000008f timtst 000000ad tios 00000080 tmr_over_ivect 0000ffde tmr_over_pvect 00000818 tmsk1 0000008c tmsk2 0000008d trap_ivect 0000fff0 trap_pvect 0000083f tscr *00000086 tx_off 0000b06b tx_on *0000b067 userprog_pvect *0000084b wait *0000b11f wait1 *0000b124 wait2 *0000b127 wait_tc *0000b058 waitx *0000b12d xirq_ivect 0000fff0 xirq_pvect 00000839