
     | | | | | | |
   _________________
  -|               |-
  -|               |-
  -|               |-
  -|    CYPRESS    |-
  -|               |-
  -|               |-   Warp VHDL Synthesis Compiler: Version 6.2 IR 28.4
  -|               |-   Copyright (C) 1991-2001 Cypress Semiconductor
   |_______________|
     | | | | | | |

======================================================================
Compiling:  mouse_controler.vhd
Options:    -yu -e10 -w100 -o2 -ygs -fO -fP -v10 -dc37128 -pcy37128p84-100jc -b mouse_controler.vhd -u mouse.hie -uch0000
======================================================================

vhdlfe V6.2 IR 27:  VHDL parser
Sat Jun 29 11:39:44 2002

Library 'work' => directory 'lc37128'
Linking 'C:\Program Files\Cypress\Warp\bin\std.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\work\cypress.vif'.
Library 'ieee' => directory 'C:\Program Files\Cypress\Warp\lib\ieee\work'
Linking 'C:\Program Files\Cypress\Warp\lib\ieee\work\stdlogic.vif'.

vhdlfe:  No errors.


tovif V6.2 IR 27:  High-level synthesis
Sat Jun 29 11:39:44 2002

Linking 'C:\Program Files\Cypress\Warp\bin\std.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\work\cypress.vif'.
Linking 'C:\Program Files\Cypress\Warp\lib\ieee\work\stdlogic.vif'.

tovif:  No errors.


topld V6.2 IR 27:  Synthesis and optimization
Sat Jun 29 11:39:44 2002

Linking 'C:\Program Files\Cypress\Warp\bin\std.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files\Cypress\Warp\lib\common\work\cypress.vif'.
Linking 'C:\Program Files\Cypress\Warp\lib\ieee\work\stdlogic.vif'.
State variable 'controler_state' is represented by a Bit_vector (0 to 2).
State encoding (sequential) for 'controler_state' is:
	stop_mouse_trans :=	b"000";
	send_command :=	b"001";
	wait_output_ready :=	b"010";
	wait_mouse_ack :=	b"011";
	rx_mouse_packets :=	b"100";
mouse_controler.vhd (line 59, col 22):  Warning: (W507) No synchronous entry to state 'stop_mouse_trans' of 'controler_state'.
mouse_controler.vhd (line 59, col 22):  Warning: (W508) No exit from state 'rx_mouse_packets' of 'controler_state'.

----------------------------------------------------------
Detecting unused logic.
----------------------------------------------------------
topld:  mouse_controler.vhd:  (E465) Signal 'mouse_data_dir' is floating (not driven by anything).
topld:  mouse_controler.vhd:  (E465) Signal 'mouse_clk_dir' is floating (not driven by anything).
    User names
	state_stop_mouse_tras
	state_wait_output_ready
	state_wait_mouse_ack
	state_rx_mouse_packets


Deleted 4 User equations/components.
Deleted 2 Synthesized equations/components.

------------------------------------------------------
Alias Detection
------------------------------------------------------

------------------------------------------------------
Aliased 0 equations, 8 wires.
------------------------------------------------------

----------------------------------------------------------
Circuit simplification
----------------------------------------------------------

----------------------------------------------------------
Circuit simplification results:

	Expanded 0 signals.
	Turned 0 signals into soft nodes.
	Maximum default expansion cost was set at 10.
----------------------------------------------------------
Created 39 PLD nodes.

topld:  2 errors.  2 warnings.
Output file not produced.

