Name AXM0199; Partno CME11EVBU, rev D; Revision 01; Date 10/05/00; Designer Forrester; Company Axiom Manufacturing; Assembly 11EVBU decode; Location U2; Device g16v8; /************************************************************************/ /* This device generates the chip select signals */ /* outputs = OE, WE, M1, M2, M3, P, */ /************************************************************************/ /** Inputs **/ pin 1 = E ; /* E clock input */ pin 11 = RW ; /* Read / Write input */ pin [2..9,13] = [A15..A8,A7] ; /* system addresses a7 - a15 */ /** Outputs **/ pin 14 = !P ; /* Peripheral select */ pin 17 = !M3 ; /* U5 select, 12K/20K */ pin 18 = !M2 ; /* U4 select, 20K/10K */ pin 19 = !M1 ; /* U3 select, 32K */ pin 16 = !WE ; /* Write enable */ pin 15 = !OE ; /* Read enable */ /* pin 12 = !EEP ;*/ /* internal EEprom selected */ /** Declarations and Intermediate Variable Definitions **/ M3_eqn = [A15..A12] : [d000..ffff] ; /* M3 = 12K rom address */ M2_eqn = [A15..A12] : [8000..cfff] ; /* M2 = 20K */ P_eqn = [A15..A7] : b580 ; /* peripheral area */ /* Actually b580-b5ff */ E_eqn = [A15..A7] : [b600..b7ff] ; /* internal EEprom area */ /** Logic Equations **/ /* EPP = E_eqn ; */ /* Internal eeprom address decode */ P = P_eqn ; /* Peripheral select out */ M3 = M3_eqn & E ; /* Rom select */ M2 = M2_eqn & E & !P & !E_eqn ; /* High ram select */ M1 = !A15 & E ; /* Low ram select */ WE = E & !RW ; /* Write enable */ OE = E & RW ; /* Read enable */